DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 680
DF3048BVX25V
Manufacturer Part Number
DF3048BVX25V
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3048BVX25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3048BVX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 20 Power-Down State
20.7
Output of the system clock ( ) can be controlled by the PSTOP bit in MSTCR. When the PSTOP
bit is set to 1, output of the system clock halts and the pin is placed in the high-impedance state.
Figure 20.3 shows the timing of the stopping and starting of system clock output. When the
PSTOP bit is cleared to 0, output of the system clock is enabled. Table 20.4 indicates the state of
the pin in various operating states.
Table 20.4
Operating State
Hardware standby
Software standby
Sleep mode
Normal operation
Rev. 3.00 Sep 27, 2006 page 652 of 872
REJ09B0325-0300
pin
System Clock Output Disabling Function
Pin State in Various Operating States
Figure 20.3 Starting and Stopping of System Clock Output
MSTCR write cycle
T1
(PSTOP = 1)
T2
T3
PSTOP = 0
High-impedance
Always high
System clock output
System clock output
High-impedance
High-impedance
PSTOP = 1
High-impedance
High-impedance
High-impedance
MSTCR write cycle
T1
(PSTOP = 0)
T2
T3
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