DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 631

• Manufacturer Part Number: DF3048BVX25V
• Description: MCU 3/5V 128K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of DF3048BVX25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

18.7.2
In program-verify mode, the data written in program mode is read to check whether it has been
correctly written in the flash memory.
After the elapse of the given programming time, clear the P bit in FLMCR1, then wait for at least
(t
watchdog timer setting is also cleared. The operating mode is then switched to program-verify
mode by setting the PV bit in FLMCR1. Before reading in program-verify mode, a dummy write
of H'FF data should be made to the addresses to be read. The dummy write should be executed
after the elapse of (t
in 16-bit units), the data at the latched address is read. Wait at least (t
before performing this read operation. Next, the originally written data is compared with the verify
data, and reprogram data is computed (see figure 18.13) and transferred to RAM. After
verification of 128 bytes of data has been completed, exit program-verify mode, wait for at least
(t
necessary, set program mode again, and repeat the program/program-verify sequence as before.
The maximum value for repetition of the program/program-verify sequence is indicated by the
maximum programming count (N). Leave a wait time of at least (t
Notes on Program/Program-Verify Procedure
1. The program/program-verify procedure for the H8/3048F-ONE is a 128-byte-unit
2. When performing continuous writing of 128-byte data to flash memory, byte-unit transfer
3. Verify data is read in word units.
4. The write pulse is applied and a flash memory write executed while the P bit in FLMCR1 is
cp
cpv
) µs before clearing the PSU bit to exit program mode. After exiting program mode, the
) µs, then determine whether 128-byte programming has finished. If reprogramming is
programming algorithm.
In order to perform 128-byte-unit programming, the lower 8 bits of the write start address must
be H'00 or H'80.
should be used.
128-byte data transfer is necessary even when writing fewer than 128 bytes of data. H'FF data
must be written to the extra addresses.
set. In the H8/3048F-ONE, write pulses should be applied as follows in the program/program-
verify procedure to prevent voltage stress on the device and loss of write data reliability.
a. After write pulse application, perform a verify-read in program-verify mode and apply a
write pulse again for any bits read as 1 (reprogramming processing). When all the 0-write
bits in the 128-byte write data are read as 0 in the verify-read operation, the
program/program-verify procedure is completed. In the H8/3048F-ONE, the number of
Program-Verify Mode
Section 18 ROM (H8/3048F-ONE: Single Power Supply, H8/3048B Mask ROM Version)
spv
) µs or more. When the flash memory is read in this state (verify data is read
Rev. 3.00 Sep 27, 2006 page 603 of 872
cswe
) µs after clearing SWE.
spvr
) µs after the dummy write
REJ09B0325-0300