DF3048BVX25V Renesas Electronics America, DF3048BVX25V Datasheet - Page 368
DF3048BVX25V
Manufacturer Part Number
DF3048BVX25V
Description
MCU 3/5V 128K PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Specifications of DF3048BVX25V
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF3048BVX25V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 10 16-Bit Integrated Timer Unit (ITU)
Bit 3—Master Enable TIOCB3 (EB3): Enables or disables ITU output at pin TIOCB
Bit 3: EB3
0
1
Bit 2—Master Enable TIOCB4 (EB4): Enables or disables ITU output at pin TIOCB
Bit 2: EB4
0
1
Bit 1—Master Enable TIOCA4 (EA4): Enables or disables ITU output at pin TIOCA
Bit 1: EA4
0
1
Bit 0—Master Enable TIOCA3 (EA3): Enables or disables ITU output at pin TIOCA
Bit 0: EA3
0
1
Rev. 3.00 Sep 27, 2006 page 340 of 872
REJ09B0325-0300
Description
TIOCB
operates as a generic input/output pin).
If XTGD = 0, EB3 is cleared to 0 when input capture A occurs in channel 1.
TIOCB
Description
TIOCB
operates as a generic input/output pin).
If XTGD = 0, EB4 is cleared to 0 when input capture A occurs in channel 1.
TIOCB
Description
TIOCA
(TIOCA
If XTGD = 0, EA4 is cleared to 0 when input capture A occurs in channel 1.
TIOCA
Description
TIOCA
(TIOCA
If XTGD = 0, EA3 is cleared to 0 when input capture A occurs in channel 1.
TIOCA
3
3
4
4
4
4
3
3
4
3
output is disabled regardless of TIOR3 and TFCR settings (TIOCB
is enabled for output according to TIOR3 and TFCR settings
output is disabled regardless of TIOR4 and TFCR settings (TIOCB
is enabled for output according to TIOR4 and TFCR settings
output is disabled regardless of TIOR4, TMDR, and TFCR settings
is enabled for output according to TIOR4, TMDR, and TFCR settings
output is disabled regardless of TIOR3, TMDR, and TFCR settings
is enabled for output according to TIOR3, TMDR, and TFCR settings
operates as a generic input/output pin).
operates as a generic input/output pin).
(Initial value)
(Initial value)
(Initial value)
(Initial value)
3
4
4
3
.
.
.
.
3
4
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