MC68331CEH20 Freescale Semiconductor, MC68331CEH20 Datasheet - Page 45

IC MCU 32BIT 20MHZ 132-PQFP

MC68331CEH20

Manufacturer Part Number
MC68331CEH20
Description
IC MCU 32BIT 20MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68331CEH20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Controller Family/series
68K
No. Of I/o's
18
Cpu Speed
20MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
2
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
80 B
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Program Memory Size
Not Required
Total Internal Ram Size
80Byte
# I/os (max)
18
Number Of Timers - General Purpose
1
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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4.2.1 Module Mapping
4.2.2 Interrupt Arbitration
MC68331
USER’S MANUAL
Control registers for all the modules in the microcontroller are mapped into a 4-Kbyte
block. The state of the module mapping bit (MM) in the SIM module configuration reg-
ister (SIMCR) determines where the control register block is located in the system
memory map. When MM = 0, register addresses range from $7FF000 to $7FFFFF;
when MM = 1, register addresses range from $FFF000 to $FFFFFF.
Each module that can generate interrupt requests has an interrupt arbitration (IARB)
field. Arbitration between interrupt requests of the same priority is performed by serial
contention between IARB field bit values. Contention must take place whenever an in-
terrupt request is acknowledged, even when there is only a single request pending.
For an interrupt to be serviced, the appropriate IARB field must have a non-zero value.
If an interrupt request from a module with an IARB field value of %0000 is recognized,
the CPU32 processes a spurious interrupt exception.
CLOCK
Figure 4-2 System Configuration and Protection
PRESCALER
Freescale Semiconductor, Inc.
2
9
For More Information On This Product,
SPURIOUS INTERRUPT MONITOR
SYSTEM INTEGRATION MODULE
MODULE CONFIGURATION
Go to: www.freescale.com
RESET STATUS
HALT MONITOR
BUS MONITOR
AND TEST
SOFTWARE WATCHDOG TIMER
PERIODIC INTERRUPT TIMER
RESET REQUEST
BERR
RESET REQUEST
IRQ [7:1]
SYS PROTECT BLOCK
4-3
4

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