MC68331CEH20 Freescale Semiconductor, MC68331CEH20 Datasheet - Page 173

IC MCU 32BIT 20MHZ 132-PQFP

MC68331CEH20

Manufacturer Part Number
MC68331CEH20
Description
IC MCU 32BIT 20MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68331CEH20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Controller Family/series
68K
No. Of I/o's
18
Cpu Speed
20MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
2
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
80 B
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Program Memory Size
Not Required
Total Internal Ram Size
80Byte
# I/os (max)
18
Number Of Timers - General Purpose
1
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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7.11 Pulse-Width Modulation Unit
MC68331
USER’S MANUAL
PCLK
The pulse-width modulation (PWM) unit has two output channels, PWMA and PWMB.
A single clock output from the prescaler multiplexer drives a 16-bit counter that is used
to control both channels. Figure 7-6 is a block diagram of the pulse-width modulation
unit.
The PWM unit has two operational modes. Fast mode uses a clocking rate equal to 1/
256 of the prescaler output rate; slow mode uses a rate equal to 1/32768 of the pres-
caler output rate. The duty cycle ratios of the two PWM channels can be individually
controlled by software. The PWMA pin can also output the clock that drives the PWM
counter. PWM pins can also be used as output pins.
PAI
CAPTURE/COMPARE CLK
PRESCALER 512
TCNT OVERFLOW
SYNCHRONIZER
DIGITAL FILTER
Figure 7-5 Pulse Accumulator Block Diagram
PACTL
&
Freescale Semiconductor, Inc.
For More Information On This Product,
MUX
TMSK2
DETECT
LOGIC
EDGE
GENERAL-PURPOSE TIMER
Go to: www.freescale.com
MUX
2:1
INTERNAL
DATA BUS
OVERFLOW
ENABLE
TFLG2
8-BIT COUNTER
PACNT
INTERRUPT
REQUESTS
10
11
16/32 PLS ACC BLOCK
7-15
7

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