MC68331CEH20 Freescale Semiconductor, MC68331CEH20 Datasheet - Page 221

IC MCU 32BIT 20MHZ 132-PQFP

MC68331CEH20

Manufacturer Part Number
MC68331CEH20
Description
IC MCU 32BIT 20MHZ 132-PQFP
Manufacturer
Freescale Semiconductor
Series
M683xxr
Datasheets

Specifications of MC68331CEH20

Core Processor
CPU32
Core Size
32-Bit
Speed
20MHz
Connectivity
EBI/EMI, SCI, SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
18
Program Memory Type
ROMless
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
132-QFP
Controller Family/series
68K
No. Of I/o's
18
Cpu Speed
20MHz
No. Of Timers
1
Embedded Interface Type
QSPI, SCI, UART
No. Of Pwm Channels
2
Digital Ic Case Style
PQFP
Rohs Compliant
Yes
Processor Series
M683xx
Core
CPU32
Data Bus Width
32 bit
Data Ram Size
80 B
Interface Type
QSPI, SCI, UART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
18
Number Of Timers
1
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Cpu Family
68K/M683xx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
20MHz
Program Memory Size
Not Required
Total Internal Ram Size
80Byte
# I/os (max)
18
Number Of Timers - General Purpose
1
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
132
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Ram Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

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D.3 System Integration Module
MC68331
USER’S MANUAL
Access
Table D-3 displays the SIM address map. The column labeled “Access” indicates the
privilege level at which the CPU must be operating to access the register. A designa-
tion of “S” indicates that supervisor access is required. A designation of “S/U” indicates
that the register can be programmed to the desired privilege level.
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S/U
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
$YFFA0A
$YFFA0C
$YFFA0E
$YFFA1A
$YFFA1C
$YFFA1E
$YFFA2A
$YFFA2C
$YFFA2E
$YFFA3A
$YFFA3C
$YFFA3E
$YFFA4A
$YFFA4C
$YFFA4E
$YFFA00
$YFFA02
$YFFA04
$YFFA06
$YFFA08
$YFFA10
$YFFA12
$YFFA14
$YFFA16
$YFFA18
$YFFA20
$YFFA22
$YFFA24
$YFFA26
$YFFA28
$YFFA30
$YFFA32
$YFFA34
$YFFA36
$YFFA38
$YFFA40
$YFFA42
$YFFA44
$YFFA46
$YFFA48
Address
15
Freescale Semiconductor, Inc.
For More Information On This Product,
Table D-3 SIM Address Map
Go to: www.freescale.com
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
REGISTER SUMMARY
TEST MODULE DISTRIBUTED REGISTER (DREG)
TEST MODULE REPETITION COUNTER (TSTRC)
TEST MODULE MASTER SHIFT A (TSTMSRA)
TEST MODULE MASTER SHIFT B (TSTMSRB)
CHIP-SELECT PIN ASSIGNMENT (CSPAR0)
CHIP-SELECT PIN ASSIGNMENT (CSPAR1)
CLOCK SYNTHESIZER CONTROL (SYNCR)
PERIODIC INTERRUPT CONTROL (PICR)
CHIP-SELECT OPTION BOOT (CSORBT)
TEST MODULE SHIFT COUNT (TSTSC)
CHIP-SELECT BASE BOOT (CSBARBT)
PERIODIC INTERRUPT TIMING (PITR)
TEST MODULE CONTROL (CREG)
CHIP-SELECT OPTION 0 (CSOR0)
CHIP-SELECT BASE 0 (CSBAR0)
SIM CONFIGURATION (SIMCR)
MODULE TEST E (SIMTRE)
FACTORY TEST (SIMTR)
8 7
PORT E PIN ASSIGNMENT (PEPAR)
PORT F PIN ASSIGNMENT (PFPAR)
PORT E DATA DIRECTION (DDRE)
PORT F DATA DIRECTION (DDRF)
SYSTEM PROTECTION CONTROL
RESET STATUS REGISTER (RSR)
SOFTWARE SERVICE (SWSR)
PORT E DATA (PORTE0)
PORT E DATA (PORTE1)
PORT F DATA (PORTF0)
PORT F DATA (PORTF1)
PORT C DATA (PORTC)
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
NOT USED
(SYPCR)
D-13
0
D

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