MC68331CEH20 Freescale Semiconductor, MC68331CEH20 Datasheet - Page 222

• Manufacturer Part Number: MC68331CEH20
• Description: IC MCU 32BIT 20MHZ 132-PQFP
• Manufacturer: Freescale Semiconductor
• Series: M683xxr

Specifications of MC68331CEH20

• Core Processor: CPU32
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, SCI, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 18
• Program Memory Type: ROMless
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 132-QFP
• Controller Family/series: 68K
• No. Of I/o's: 18
• Cpu Speed: 20MHz
• No. Of Timers: 1
• Embedded Interface Type: QSPI, SCI, UART
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PQFP
• Rohs Compliant: Yes
• Processor Series: M683xx
• Core: CPU32
• Data Bus Width: 32 bit
• Data Ram Size: 80 B
• Interface Type: QSPI, SCI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 1
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Cpu Family: 68K/M683xx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 20MHz
• Program Memory Size: Not Required
• Total Internal Ram Size: 80Byte
• # I/os (max): 18
• Number Of Timers - General Purpose: 1
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 132
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Ram Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

D
Y = M111, where M is the logic state of the module mapping (MM) bit in the SIMCR
D.3.1 SIMCR — Module Configuration Register
EXOFF — External Clock Off
FRZSW — Freeze Software Enable
D-14
EXOFF
Access
15
0
SIMCR controls system configuration. SIMCR can be read or written at any time, ex-
cept for the module mapping (MM) bit, which can only be written once.
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
RESET:
0 = The CLKOUT pin is driven from an internal clock source.
1 = The CLKOUT pin is placed in a high-impedance state.
0 = When FREEZE is asserted, the software watchdog and periodic interrupt timer
1 = When FREEZE is asserted, the software watchdog and periodic interrupt timer
FRZSW
14
0
counters continue to run.
counters are disabled, preventing interrupts during software debug.
$YFFA5A
$YFFA5C
$YFFA5E
$YFFA6A
$YFFA6C
$YFFA6E
$YFFA7A
$YFFA7C
$YFFA7E
$YFFA50
$YFFA52
$YFFA54
$YFFA56
$YFFA58
$YFFA60
$YFFA62
$YFFA64
$YFFA66
$YFFA68
$YFFA70
$YFFA72
$YFFA74
$YFFA76
$YFFA78
Address
FRZBM
13
0
15
12
0
0
Freescale Semiconductor, Inc.
For More Information On This Product,
DATA11
SLVEN
11
Table D-3 SIM Address Map
Go to: www.freescale.com
NOT USED
NOT USED
NOT USED
NOT USED
REGISTER SUMMARY
10
0
0
CHIP-SELECT OPTION 10 (CSOR10)
CHIP-SELECT BASE 10 (CSBAR10)
9
0
CHIP-SELECT OPTION 1 (CSOR1)
CHIP-SELECT OPTION 2 (CSOR2)
CHIP-SELECT OPTION 3 (CSOR3)
CHIP-SELECT OPTION 4 (CSOR4)
CHIP-SELECT OPTION 5 (CSOR5)
CHIP-SELECT OPTION 6 (CSOR6)
CHIP-SELECT OPTION 7 (CSOR7)
CHIP-SELECT OPTION 8 (CSOR8)
CHIP-SELECT OPTION 9 (CSOR9)
CHIP-SELECT BASE 1 (CSBAR1)
CHIP-SELECT BASE 2 (CSBAR2)
CHIP-SELECT BASE 3 (CSBAR3)
CHIP-SELECT BASE 4 (CSBAR4)
CHIP-SELECT BASE 5 (CSBAR5)
CHIP-SELECT BASE 6 (CSBAR6)
CHIP-SELECT BASE 7 (CSBAR7)
CHIP-SELECT BASE 8 (CSBAR8)
CHIP-SELECT BASE 9 (CSBAR9)
SHEN
8
0
SUPV
7
1
8 7
MM
6
1
5
0
0
NOT USED
NOT USED
NOT USED
NOT USED
4
0
0
3
1
USER’S MANUAL
1
IARB
$YFFA00
MC68331
1
0
1
0