MCHC705JJ7CPE Freescale Semiconductor, MCHC705JJ7CPE Datasheet - Page 62

• Manufacturer Part Number: MCHC705JJ7CPE
• Description: IC MCU 8BIT 224 BYTES RAM 20PDIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MCHC705JJ7CPE

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SIO
• Peripherals: POR, Temp Sensor, WDT
• Number Of I /o: 14
• Program Memory Size: 6KB (6K x 8)
• Program Memory Type: OTP
• Ram Size: 224 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 4x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Processor Series: HC705JJ
• Core: HC05
• Data Bus Width: 8 bit
• Data Ram Size: 224 B
• Interface Type: SIOP
• Maximum Clock Frequency: 2.1 MHz
• Number Of Programmable I/os: 14
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 4 Channel
• Package: 20PDIP
• Family Name: HC05
• Maximum Speed: 2.1 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Parallel Input/Output
62
Port B
1. DDRB can always be read or written.
2. Don’t care
PB0
PB1
PB2
PB3
PB4
Pin
4. If the PB4 pin is to be an input to the analog subsystem or a digital input, then the DDRB4 bit must
be cleared. In this case, the PB4 pin can still be read, but the voltage present will be returned as a
binary value. Depending on the external application, the PB4 pulldown may also be disabled by
setting the PDIB4 pulldown inhibit bit. In this case, both the digital and analog functions connected
to this pin can be utilized.
CMP1 COE1
X
X
X
X
X
0
1
(2)
(2)
(2)
(2)
(2)
Comparator 1
X
X
X
X
0
1
1
(2)
(2)
(2)
(2)
MC68HC705JJ7 • MC68HC705JP7 Advance Information Data Sheet, Rev. 4.1
OPT in COPR
X
X
X
0
1
1
1
(2)
(2)
(2)
Table 7-2. Port B Pin Functions — PB0–PB4
Control Bits
Timer
OLVL
X
X
X
0
0
0
1
(2)
(2)
(2)
in MOR
SWPDI
X
X
X
X
X
X
0
0
1
0
0
1
(2)
(2)
(2)
(2)
(2)
(2)
.
PDIBx DDRBx
X
X
X
X
X
X
X
X
0
1
0
1
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
Port B
0
0
0
1
0
0
0
1
1
1
1
1
(1)
PORTB Access
Read
Data
Data
Data
Data
Pin
Pin
Pin
Pin
Pin
Pin
(Pin or Data
1
1
Register)
Write
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Data
Freescale Semiconductor
Pulldown
On
Off
Off
Off
On
Off
Off
Off
Off
Off
Off
Off
Port B Pins
Result on
PBx out
PB4 out
PB4 out
PB4 out
PB4 in
PB4 in
PB4 in
PBx in
PBx in
PBx in
Pin
1
1