ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 77

• Manufacturer Part Number: ST10F280
• Description: MCU 16BIT 512K FLASH MAC 208-PBG
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F280

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, SSC
• Peripherals: POR, PWM, WDT
• Number Of I /o: 143
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 32x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-PBGA
• Processor Series: ST10F28x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

DP0H (F102h / 81h)
12.2.1 - Alternate Functions of PORT0
When an external bus is enabled, PORT0 is used
as data bus or address/data bus.
Note that an external 8-bit de-multiplexed bus only
uses P0L, while P0H is free for I/O (provided that
no other bus mode is enabled).
PORT0 is also used to select the system start-up
configuration. During reset, PORT0 is configured
to input, and each line is held high through an
internal pull-up device. Each line can now be indi-
vidually pulled to a low level (see DC-level specifi-
cations) through an external pull-down device. A
default configuration is selected when the respec-
tive PORT0 lines are at a high level. Through pull-
ing individual lines to a low level, this default can
be changed according to the needs of the applica-
tions.
The internal pull-up devices are designed such
that an external pull-down resistors can be used to
apply a correct low level. These external pull-down
resistors can remain connected to the PORT0 pins
also during normal operation, however, care has to
be taken such that they do not disturb the normal
function of PORT0 (this might be the case, for
example, if the external resistor is too strong). With
Figure 29 : PORT0 I/O and Alternate Functions
DP0X.y
15
-
PORT0
General Purpose
14
Bit
Alternate Function
-
P0H
P0L
Input/Output
13
-
Port direction register DP0H or DP0L bit y
DP0X.y = 0: Port line P0X.y is an input (high-impedance)
DP0X.y = 1: Port line P0X.y is an output
12
-
P0H.7
P0H.6
P0H.5
P0H.4
P0H.3
P0H.2
P0H.1
P0H.0
P0L.7
P0L.6
P0L.5
P0L.4
P0L.3
P0L.2
P0L.1
P0L.0
11
-
Demultiplexed Bus
10
-
8-bit
9
a)
-
D7
D6
D5
D4
D3
D2
D1
D0
8
-
DP0H.7 DP0H.6 DP0H.5 DP0H.4 DP0H.3 DP0H.2 DP0H.1 DP0H.0
RW
Demultiplexed Bus
7
ESFR
16-bit
b)
RW
the end of reset, the selected bus configuration will
be written to the BUSCON0 register. The configu-
ration of the high byte of PORT0, will be copied
into the special register RP0H. This read-only reg-
ister holds the selection for the number of chip
selects and segment addresses. Software can
read this register in order to react according to the
selected configuration, if required. When the reset
is terminated, the internal pull-up devices are
switched off, and PORT0 will be switched to the
appropriate operating mode.
During external accesses in multiplexed bus
modes PORT0 first outputs the 16-bit intra-seg-
ment address as an alternate output function.
PORT0 is then switched to high-impedance input
mode to read the incoming instruction or data. In
8-bit data bus mode, two memory cycles are
required for word accesses, the first for the low
byte and the second for the high byte of the word.
During write cycles PORT0 outputs the data byte
or word after outputting the address. During exter-
nal accesses in de-multiplexed bus modes
PORT0 reads the incoming instruction or data
word or outputs the data byte or word.
6
Function
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
RW
5
Multiplexed Bus
RW
4
c)
8-bit
A15
A14
A13
A12
A11
A10
A9
A8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
RW
3
RW
Multiplexed Bus
Reset Value: - - 00h
2
16-bit
d)
RW
ST10F280
1
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
77/186
RW
0