ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 136

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST10F280
18.2.1 - Protected Power Down Mode
This mode is selected by clearing the bit PWD-
CFG in register SYSCON to ‘0’.
In this mode, the Power Down mode can only be
entered if the NMI (Non Maskable Interrupt) pin is
externally pulled low while the PWRDN instruction
is executed.
This feature can be used in conjunction with an
external power failure signal which pulls the NMI
pin low when a power failure is imminent. The
microcontroller will enter the NMI trap routine
which can save the internal state into RAM. After
the internal state has been saved, the trap routine
may set a flag or write a certain bit pattern into
specific RAM locations, and then execute the
PWRDN instruction. If the NMI pin is still low at
this time, Power Down mode will be entered, oth-
erwise program execution continues. During
power down the voltage delivered by the on-chip
voltage regulator automatically lowers the internal
logic supply down to 2.5 V, saving the power while
EXICON (F1C0h / E0h)
136/186
EXIxES
(x=7...0)
15
EXI7ES
RW
Bit
14
13
EXI6ES
00
01
10
11
RW
External Interrupt x Edge Selection Field (x=7...0)
Fast external interrupts disabled: standard mode
EXxIN pin not taken in account for entering/exiting Power Down mode.
Interrupt on positive edge (rising)
Enter Power Down mode if EXiIN = ‘0’, exit if EXxIN = ‘1’ (referred as ‘high’ active level)
Interrupt on negative edge (falling)
Enter Power Down mode if EXiIN = ‘1’, exit if EXxIN = ‘0’ (referred as ‘low’ active level)
Interrupt on any edge (rising or falling)
Always enter Power Down mode, exit if EXxIN level changed.
12
11
EXI5ES
RW
10
9
EXI4ES
RW
8
ESFR
the contents of the internal RAM and all registers
will still be preserved.
Exiting Power Down Mode
In this mode, the only way to exit Power Down
mode is with an external hardware reset.
The initialization routine (executed upon reset)
can check the identification flag or bit pattern
within RAM to determine whether the controller
was initially switched on, or whether it was prop-
erly restarted from Power Down mode.
18.2.2 - Interruptable Power Down Mode
This mode is selected by setting the bit bit PWD-
CFG in register SYSCON to ‘1’.
In this mode, the Power Down mode can be
entered if enabled Fast External Interrupt pins
(EXxIN pins, alternate functions of Port 2 pins,
with x = 7...0) are in their inactive level. This inac-
tive level is configured with the EXIxES bit field in
the EXICON register, as follow:
7
EXI3ES
Function
RW
6
5
EXI2ES
RW
4
3
EXI1ES
RW
Reset Value: 0000h
2
1
EXI0ES
RW
0

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