ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 113

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Asynchronous Mode Baud rates
For asynchronous operation, the Baud rate
generator provides a clock with 16 times the rate
of the established Baud rate. Every received Bit is
sampled at the 7th, 8th and 9th cycle of this clock.
The Baud rate for asynchronous operation of
serial channel ASC0 and the required reload
value for a given Baud rate can be determined by
the following formulas:
(S0BRL) represents the content of the reload
register, taken as unsigned 13 Bit integer,
(S0BRS) represents the value of Bit S0BRS (‘0’ or
‘1’), taken as integer.
Table 24 : Commonly Used Baud Rates by Reload Value and Deviation Errors
Note: The deviation errors given in the Table 24 are rounded. To avoid deviation errors use a Baud rate
Baud Rate (Baud)
1 250 000
112 000
56 000
38 400
19 200
9 600
4 800
2 400
1 200
crystal (providing a multiple of the ASC0/SSC sampling frequency).
600
300
153
S0BRS = ‘0’, f
Deviation Error
+1.5% /7.0%
+1.5% /3.0%
+1.7% /1.4%
+0.2% /1.4%
+0.2% /0.0%
0.0% / 0.0%
+0.2% /0.6%
+0.2% /0.2%
0.1% / 0.0%
0.0% / 0.0%
0.0% / 0.0%
0.0% / 0.0%
CPU
= 40MHz
Reload Value
1FE8 / 1FE9
000A / 000B
0000 / 0000
0015 / 0016
001F / 0020
0040 / 0041
0081 / 0082
0103 / 0104
0207 / 0208
0410 / 0411
0822 / 0823
1045 / 1046
(hexa)
Baud Rate (Baud)
Using the above equation, the maximum Baud
rate can be calculated for any given clock speed.
Baud rate versus reload register value (SOBRS=0
and SOBRS=1) is described in Table 24.
B
S0BRL = (
Async
833 333
112 000
56 000
38 400
19 200
9 600
4 800
2 400
1 200
600
300
102
=
S0BRS = ‘1’, f
16 x [2 + (S0BRS)] x [(S0BRL) + 1]
16 x [2 + (S0BRS)] x B
Deviation Error
+6.3% /7.0%
+6.3% /0.8%
+3.3% /1.4%
+0.9% /1.4%
+0.9% /0.2%
+0.4% /0.2%
+0.1% /0.2%
+0.1% /0.1%
+0.1% /0.0%
0.0% / 0.0%
0.0% / 0.0%
0.0% / 0.0%
CPU
f
CPU
f
CPU
= 40MHz
Reload Value
00AC / 00AD
0AD8 / 0AD9
1FE8 / 1FE9
000D / 000E
002A / 002B
015A / 015B
02B5 / 02B6
056B / 056C
0000 / 0000
0006 / 0007
0014 / 0015
0055 / 0056
Async
ST10F280
(hexa)
113/186
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