ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 76

• Manufacturer Part Number: ST10F280
• Description: MCU 16BIT 512K FLASH MAC 208-PBG
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F280

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, SSC
• Peripherals: POR, PWM, WDT
• Number Of I /o: 143
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 32x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-PBGA
• Processor Series: ST10F28x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F280
On most of the port lines, the user software is responsible for setting the proper direction when using an
alternate input or output function of a pin. This is done by setting or clearing the direction control bit DPx.y
of the pin before enabling the alternate function. There are port lines, however, where the direction of the
port line is switched automatically. For instance, in the multiplexed external bus modes of PORT0, the
direction must be switched several times for an instruction fetch in order to output the addresses and to
input the data. Obviously, this cannot be done through instructions. In these cases, the direction of the
port line is switched automatically by hardware if the alternate function of such a pin is enabled.
To determine the appropriate level of the port output latches check how the alternate data output is com-
bined with the respective port latch output.
There is one basic structure for all port lines with only an alternate input function. Port lines with only an
alternate output function, however, have different structures due to the way the direction of the pin is
switched and depending on whether the pin is accessible by the user software or not in the alternate func-
tion mode.
All port lines that are not used for these alternate functions may be used as general purpose I/O lines.
When using port pins for general purpose output, the initial output value should be written to the port latch
prior to enabling the output drivers, in order to avoid undesired transitions on the output pins. This applies
to single pins as well as to pin groups (see examples below).
SINGLE_BIT: BSET
BIT_GROUP:
Note: When using several BSET pairs to control more pins of one port, these pairs must be separated by
12.2 - PORT0
The two 8-bit ports P0H and P0L represent the higher and lower part of PORT0, respectively. Both halves
of PORT0 can be written (e.g. via a PEC transfer) without effecting the other half.
If this port is used for general purpose I/O, the direction of each line can be configured via the correspond-
ing direction registers DP0H and DP0L.
P0L (FF00h / 80h)
P0H (FF02h / 81h)
DP0L (F100h / 80h)
76/186
P0X.y
15
15
15
-
-
-
Bit
14
instructions, which do not reference the respective port (see “Particular Pipeline Effects” in Chap-
ter 6 - Central Processing Unit (CPU)).
-
14
14
-
-
13
-
13
13
-
-
BSET
BFLDH
BFLDH
Port data register P0H or P0L bit y
12
-
12
12
-
-
11
-
DP4.7
DP4, #24H, #24H
P4.7
P4, #24H, #24H
11
11
-
-
10
-
10
10
9
-
-
-
8
-
9
9
-
-
DP0L.7 DP0L.6 DP0L.5 DP0L.4 DP0L.3 DP0L.2 DP0L.1 DP0L.0
RW
7
8
8
-
-
ESFR
SFR
SFR
; Initial output level is "high"
; Switch on the output driver
; Initial output level is "high"
; Switch on the output drivers
P0H.7 P0H.6 P0H.5 P0H.4 P0H.3 P0H.2 P0H.1 P0H.0
P0L.7 P0L.6 P0L.5 P0L.4 P0L.3 P0L.2 P0L.1 P0L.0
RW
RW
RW
7
7
6
Function
RW
RW
6
6
RW
5
RW
RW
5
5
RW
4
RW
RW
4
4
RW
3
RW
RW
3
3
RW
Reset Value: - - 00h
Reset Value: - - 00h
Reset Value: - - 00h
2
RW
RW
2
2
RW
1
RW
RW
1
1
RW
RW
RW
0
0
0