ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 123

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Bit Timing Register (EF04h/EE04h)
Note This register can only be written, if the
Mask Registers
Messages
identifiers. Incoming frames are masked with their
appropriate global masks. Bit IDE of the incoming
message determines whether the standard 11 bit
mask in Global Mask Short or the 29 bit extended
mask in Global Mask Long is to be used. Bit
holding a “0” mean “don’t care”, so do not
Global Mask Short (EF06h/EE06h)
Upper Global Mask Long (EF08h/EE08h)
ID28...18
15
15
15
R
0
TSEG1
TSEG2
ID20...18
SJW
BRP
configuration change enable bit (CCE) is
set.
Bit
Bit
RW
14
14
14
can
TSEG2
RW
13
13
13
Baud Rate Prescaler
For generating the bit time quanta the CPU frequency is divided by 2 x (BRP+1).
(Re)Synchronization Jump Width
Adjust the bit time by maximum (SJW+1) time quanta for re-synchronization.
Time Segment before sample point
There are (TSEG1+1) time quanta before the sample point. Valid values for TSEG1 are “2...15”.
Time Segment after sample point
There are (TSEG2+1) time quanta after the sample point. Valid values for TSEG2 are “1...7”.
Identifier (11 Bit)
Mask to filter incoming messages with standard identifier.
use
12
12
12
R
ID20...13
1
RW
standard
11
11
11
R
1
10
10
10
R
1
TSEG1
or
RW
extended
R
9
9
1
9
R
8
8
1
8
XReg
XReg
XReg
compare the message’s identifier in the respective
bit position.
The last message object (15) has an additional
individually
(Mask of Last Message) for the complete
arbitration field. This allows classes of messages
to be received in this object by masking some bits
of the identifier.
Note The Mask of Last Message is ANDed with
7
7
7
Function
Function
SJW
RW
the Global Mask that corresponds to the
incoming message.
6
6
6
5
5
5
programmable
ID28...21
ID28...21
4
4
4
RW
RW
3
3
3
BRP
Reset Value: UUUUh
Reset Value: UUUUh
RW
Reset Value: UFUUh
acceptance
2
2
2
ST10F280
1
1
1
123/186
mask
0
0
0

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