ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 180

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ST10F280

Manufacturer Part Number
ST10F280
Description
MCU 16BIT 512K FLASH MAC 208-PBG
Manufacturer
STMicroelectronics
Series
ST10r
Datasheet

Specifications of ST10F280

Core Processor
ST10
Core Size
16-Bit
Speed
40MHz
Connectivity
ASC, CAN, EBI/EMI, SSC
Peripherals
POR, PWM, WDT
Number Of I /o
143
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
18K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 32x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
208-PBGA
Processor Series
ST10F28x
Core
ST10
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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ST10F280
Figure 90 : External Bus Arbitration, (regaining the bus)
Notes: 1. This is the last chance for BREQ to trigger the indicated regain-sequence. Even if BREQ is activated earlier, the regain-sequence
180/186
(On P6.x)
is initiated by HOLD going high. Please note that HOLD may also be disactivated without the ST10F280 requesting the bus.
2. The next ST10F280 driven bus cycle may start here.
CLKOUT
Signals
BREQ
HOLD
HLDA
Other
CSx
t
62
t
61
1)
t
62
t
62
t
t
63
67
2)
t
65

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