ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 62

• Manufacturer Part Number: ST10F280
• Description: MCU 16BIT 512K FLASH MAC 208-PBG
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F280

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, SSC
• Peripherals: POR, PWM, WDT
• Number Of I /o: 143
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 32x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-PBGA
• Processor Series: ST10F28x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F280
11.2.1 - Operating Modes
The XPWM module provides four different operat-
ing modes:
– Mode 0 Standard PWM generation (edge
– Mode 1 Symmetrical PWM generation (center
– Burst mode combines channels 0 and 1
– Single shot mode available on channels 2 and 3
Note: The output signals of the XPWM module
11.2.1.1 - Mode 0: Standard PWM Generation
(Edge Aligned PWM)
Mode 0 is selected by clearing the respective bit
XPMx in register XPWMCON1 to ‘0’. In this mode
the timer XPTx of the respective XPWM channel
is always counting up until it reaches the value in
the associated period shadow register. Upon the
next count pulse the timer is reset to 0000h and
Figure 20 : Operation and Output Waveform in Mode 0
62/186
aligned PWM) available on all four channels
aligned PWM) available on all four channels
are XORed with the outputs of the
respective bits of XPOLAR register. After
reset these bits are cleared, so the PWM
signals are directly driven to the output pins.
By setting the respective bits of XPOLAR
register to ‘1’ the PWM signal may be
inverted (XORed with ‘1’) before being
driven to the output pin. The descriptions
below refer to the standard case after reset,
i.e. direct driving.
XPTx Count
Value
XPWx Pulse
Width=0
XPWx=1
XPWx=2
XPWx=4
XPWx=6
XPWx=7
XPWx=8
XPPx
Period=7
Latch Shadow Registers
Interrupt Request
6
7
LSR
0
1
2
3
4
5
6
7
LSR
0
continues counting up with subsequent count
pulses. The XPWM output signal is switched to
high level when the timer contents are equal to or
greater than the contents of the pulse width
shadow register. The signal is switched back to
low level when the respective timer is reset to
0000h, i.e. below the pulse width shadow register.
The period of the resulting PWM signal is deter-
mined by the value of the respective XPPx
shadow register plus 1, counted in units of the
timer resolution.
The duty cycle of the XPWM output signal is con-
trolled by the value in the respective pulse width
shadow register. This mechanism allows the
selection of duty cycles from 0% to 100% including
the boundaries. For a value of 0000h the output
will remain at a high level, representing a duty
cycle of 100%. For a value higher than the value in
the period register the output will remain at a low
level, which corresponds to a duty cycle of 0%.
The Figure 20 illustrates the operation and output
waveforms of a XPWM channel in mode 0 for dif-
ferent values in the pulse width register.
This mode is referred to as Edge Aligned PWM,
because the value in the pulse width (shadow)
register only effects the positive edge of the out-
put signal. The negative edge is always fixed and
related to the clearing of the timer.
1
2
3
PWM_Period
4
5
6
LSR
7
Mode0
0
1
= [XPPx] + 1
Duty Cycle
100%
87.5%
75%
50%
25%
12.5%
0%