ST10F280 STMicroelectronics, ST10F280 Datasheet - Page 154

• Manufacturer Part Number: ST10F280
• Description: MCU 16BIT 512K FLASH MAC 208-PBG
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F280

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, SSC
• Peripherals: POR, PWM, WDT
• Number Of I /o: 143
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 18K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 32x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 208-PBGA
• Processor Series: ST10F28x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F280
XPERCON (F024h / 12h)
Note: - When both CAN and XPWM are disabled via XPERCON setting, then any access in the address
154/186
CAN1EN
CAN2EN
XRAMEN
XPERCONEN3
XPWMEN
15
-
14
-
Bit
range 00’EC00h 00’EFFFh will be directed to external memory interface, using the BUSCONx
register corresponding to address matching ADDRSELx register. P4.4 and P4.7 can be used as
General Purpose I/O when CAN2 is not enabled, and P4.5 and P4.6 can be used as General
Purpose I/O when CAN1 is not enabled.
- The default XPER selection after Reset is : XCAN1 is enabled, XCAN2 is disabled, XRAM is
enabled, XPORT9, XTIMER, XPORT10, XPWM are disabled.
- Register XPERCON cannot be changed after the global enabling of XPeripherals, i.e. after
setting of bit XPEN in SYSCON register.
13
-
12
-
0
1
0
1
0
1
0
1
0
1
11
-
CAN1 Enable Bit
Accesses to the on-chip CAN1 XPeripheral and its functions are disabled. P4.5 and P4.6 pins
can be used as general purpose I/Os. Address range 00’EF00h-00’EFFFh is only directed to
external memory if CAN2EN and XPWM bits are cleared also.
The on-chip CAN1 XPeripheral is enabled and can be accessed.
CAN2 Enable Bit
Accesses to the on-chip CAN2 XPeripheral and its functions are disabled. P4.4 and P4.7 pins
can be used as general purpose I/Os. Address range 00’EE00h-00’EEFFh is only directed to
external memory if CAN1EN and XPWM bits are cleared also.
The on-chip CAN2 XPeripheral is enabled and can be accessed.
XRAM Enable Bit
Accesses to the on-chip 16K Byte XRAM are disabled, external access performed.
The on-chip 16K Byte XRAM is enabled and can be accessed.
XPORT9,XTIMER, XPORT10, XADCMUX Enable Bit
Accesses to the XPORT9, XTIMER, XPORT10, XADCMUX peripherals are disabled, external
access performed.
The on-chip XPORT9, XTIMER, XPORT10, XADCMUX peripherals are enabled and can be
accessed.
XPWM Enable Bit
Accesses to the on-chip XPWM are disabled, external access performed. Address range
00’EC00h-00’ECFFh is only directed to external memory if CAN1EN and CAN2EN are ‘0’ also
The on-chip XPWM is enabled and can be accessed.
10
-
9
-
8
-
7
-
6
-
5
-
ESFR
XPWMEN
RW
4
Function
XPERCONEN3
RW
3
XRAMEN
RW
2
Reset Value: - - 05h
CAN2EN
RW
1
CAN1EN
RW
0