ATXMEGA16A4-CUR Atmel, ATXMEGA16A4-CUR Datasheet - Page 35

• Manufacturer Part Number: ATXMEGA16A4-CUR
• Description: MCU AVR 16+4KB FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA16A4-CUR

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8077H–AVR–12/09
• Bit 3:2 - BLBAT[1:0]: Boot Lock Bit Application Table Section
These bits indicate the locking mode for the Application Table Section. Even though the BLBAT
bits are writable, they can only be written to a stricter locking. Resetting the BLBAT bits is only
possible by executing a Chip Erase Command.
Table 4-10.
• Bit 1:0 - LB[1:0]: Lock Bits
These bits indicate the locking mode for the Flash and EEPROM in Programming Mode. These
bits are writable only through an external programming interface. Resetting the Lock Bits is only
possible by executing a Chip Erase Command.
Table 4-11.
BLBAT[1:0]
LB[1:0]
11
10
01
00
11
10
00
Boot Lock Bit for the Application Table Section
Boot Lock Bit for The Boot Section
Group Configuration
Group Configuration
NOLOCK3
RWLOCK
RWLOCK
NOLOCK
WLOCK
WLOCK
RLOCK
Description
No Lock, no restrictions for SPM and (E)LPM accessing
the Application Table Section.
Write Lock, SPM is not allowed to write the Application
Table
Read Lock, (E)LPM executing from the Boot Loader
Section is not allowed to read from the Application Table
Section.
If the interrupt vectors are placed in the Boot Loader
Section, interrupts are disabled while executing from the
Application Section.
Read and Write Lock, SPM is not allowed to write to the
Application Table Section and (E)LPM executing from
the Boot Loader Section is not allowed to read from the
Application Table Section.
If the interrupt vectors are placed in the Boot Loader
Section, interrupts are disabled while executing from the
Application Section.
Description
No Lock, no memory locks enabled.
Write lock, programming of the Flash and EEPROM is
disabled for the programming interface. Fuse bits are
locked for write from the programming interface.
Read and Write Lock, programming and
read/verification of the flash and EEPROM is disabled
for the programming interface. The lock bits and fuses
are locked for read and write from the programming
interface.
XMEGA A
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