ATXMEGA16A4-CUR Atmel, ATXMEGA16A4-CUR Datasheet - Page 195

• Manufacturer Part Number: ATXMEGA16A4-CUR
• Description: MCU AVR 16+4KB FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA16A4-CUR

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

17.3.10
17.3.11
8077H–AVR–12/09
COMPH - Real Time Counter Compare Register H
COMPL - Real Time Counter Compare Register L
The COMPH and COMPL register pair represent the 16-bit value COMP. COMP is constantly
compared with the counter value (CNT). A compare match will set the COMPIF in the INT-
FLAGS register. Reading and writing 16-bit values require special attention, refer to
”Configuration Change Protection” on page 12
Due to synchronization between RTC clock and the system clock domains, there is a latency of
two RTC clock cycles from updating the register until this has an effect. Application SW needs to
check that the SYNCBUSY flag in the
192
If the COMP value is higher than the PER value, no RTC Compare Match interrupt requests or
events will ever be generated.
• Bits 7:0 - COMP[15:8]: Real Time Counter Compare Register High byte
These bits hold the 8 MSB of the 16-bit RTC compare value.
• Bits 7:0 - COMP[7:0]: Real Time Counter Compare Register Low byte
These bits hold the 8 LSB of the 16-bit RTC compare value.
Bit
+0x0D
Read/Write
Initial Value
Bit
+0x0C
Read/Write
Initial Value
is cleared before writing to this register.
R/W
R/W
7
0
7
0
R/W
R/W
6
0
6
0
R/W
R/W
5
0
5
0
”STATUS - Real Time Counter Status Register” on page
R/W
R/W
4
0
4
0
COMP[15:8]
COMP[7:0]
for details.
R/W
R/W
3
0
3
0
R/W
R/W
2
0
2
0
R/W
R/W
1
0
1
0
XMEGA A
R/W
R/W
0
0
0
0
COMPH
COMPL
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