ATXMEGA16A4-CUR Atmel, ATXMEGA16A4-CUR Datasheet - Page 255

• Manufacturer Part Number: ATXMEGA16A4-CUR
• Description: MCU AVR 16+4KB FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA16A4-CUR

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

21.16 Register Summary
21.16.1
21.16.2
21.17 Interrupt Vector Summary
Table 21-10. USART Interrupt vectors and their word offset address
8077H–AVR–12/09
Address
Address
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
Offset
0x00
0x02
0x04
Register Description - USART
Register Description - USART in Master SPI Mode
Name
Name
BAUDCTRLA
BAUDCTRLB
BAUDCTRLA
BAUDCTRLB
Reserved
STATUS
Reserved
CTRLA
CTRLB
CTRLC
STATUS
DATA
CTRLC
CTRLA
CTRLB
DATA
Bit 7
RXCIF
RXCIF
Bit 7
RXC_vect
DRE_vect
TXC_vect
-
-
-
Source
CMODE[1:0]
-
-
-
CMODE[1:0]
Bit 6
TXCIF
Bit 6
TXCIF
-
-
-
-
-
-
BSCALE[3:0]
BSCALE[3:0]
Interrupt Description
USART Receive Complete Interrupt vector
USART Data Register Empty Interrupt vector
USART Transmit Complete Interrupt vector
DREIF
Bit 5
-
-
DREIF
Bit 5
RXCINTLVL[1:0]
-
-
-
PMODE[1:0]
RXCINTLVL[1:0]
Bit 4
FERR
RXEN
-
Bit 4
RXEN
-
-
-
DATA[7:0]
BSEL[7:0]
DATA[7:0]
BSEL[7:0]
SBMODE
BUFOVF
Bit 3
TXEN
-
Bit 3
TXEN
TXCINTLVL[1:0]
-
-
-
TXCINTLVL[1:0]
CLK2X
Bit 2
PERR
-
UDORD
Bit 2
-
-
-
BSEL[11:8]
BSEL[11:8]
CHSIZE[2:0]
MPCM
Bit 1
Bit 1
UCPH
-
-
-
-
-
DREINTLVL[1:0]
DREINTLVL[1:0]
XMEGA A
Bit 0
Bit 0
RXB8
TXB8
-
-
-
-
-
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