EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 801

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-IQZ

Manufacturer Part Number
EP9302-IQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-IQZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
LQFP
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1253

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9302-IQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9302-IQZ
Manufacturer:
CIRRUS
Quantity:
20 000
PxDDR
DS785UM1
31
15
Definition:
Bit Descriptions:
Address:
Definition:
Bit Descriptions:
30
14
29
13
28
12
RSVD
PADR: 0x8084_0000 - Read/Write
PBDR: 0x8084_0004 - Read/Write
PCDR: 0x8084_0008 - Read/Write
PDDR: 0x8084_000C - Read/Write
PEDR: 0x8084_0020 - Read/Write
PFDR: 0x8084_0030 - Read/Write
PGDR: 0x8084_0038 - Read/Write
PHDR: 0x8084_0040 - Read/Write
Port x Data Register. Values written to this 8-bit read/write register will be
output on port x pins if the corresponding data direction bits are set HIGH (port
output). Values read from this register reflect the external state of Port x
inputs. All bits are cleared by a system reset. (“X.” stands for a letter, A
through H.)
RSVD:
PxDATA:
PADDR: 0x8084_0010 - Read/Write
PBDDR: 0x8084_0014 - Read/Write
PCDDR: 0x8084_0018 - Read/Write
PDDDR: 0x8084_001C - Read/Write
PEDDR: 0x8084_0024 - Read/Write
PFDDR: 0x8084_0034 - Read/Write
PGDDR: 0x8084_003C - Read/Write
PHDDR: 0x8084_0044 - Read/Write
Port x Data Direction Register. Bits cleared in this 8-bit read/write register will
select the corresponding pin in port x to become an input, setting a bit sets the
pin to output. All bits are cleared by a system reset. (“X.” stands for a letter, A
through H.)
RSVD:
27
11
26
10
25
9
Copyright 2007 Cirrus Logic
Reserved. Unknown During Read.
Port x 8-bit data.
Reserved. Unknown During Read.
24
8
RSVD
23
7
22
6
21
5
20
4
PxDIR
19
3
EP93xx User’s Guide
18
2
GPIO Interface
17
1
28-11
16
0
28

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