EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 491

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

PCAttribute
DS785UM1
12.6.2 PCMCIA Configuration Registers (EP9315 Processor Only)
WA
31
15
Address: 0x8008_0020 - Read/Write
Default: 0x0000_0000
Definition: PC Card Attribute register
Bit Descriptions:
The SMC has additional functionality to support a PC-card in Memory Bank 4. Memory Bank
4 has three registers to control wait-states and device width for attribute, common memory
and IO address spaces; and a single PCMCIA control register to provide global control for the
card.
30
14
RSVD
29
13
28
12
EBIBRKDIS:
RSVD:
WA:
AA:
RSVD
27
11
26
10
HA
Copyright 2007 Cirrus Logic
25
9
EBI Break Disable - Read/Write
The value written to this bit specifies the circumstances for
when the SMC will release the external memory bus:
0 - The SMC releases the external memory bus at the end
of each access to this memory bank
1 - The SMC releases the external memory bus after it has
completed all pending accesses to this memory bank
Reserved - Unknown During Read
Attribute Space Width - Read/Write
The value written to this bit specifies the bus-width of the
Attribute space:
0 - 8-bit wide Attribute space
1 - 16-bit wide Attribute space
Attribute Space Access time - Read/Write
The value written to this field specifies the minimum
‘number of HCLK cycles, minus 1’ that the data strobe,
MCDAENn
24
8
,
23
7
is asserted during a Read or Write access.
22
6
21
5
20
4
AA
PA
19
Static Memory Controller
3
EP93xx User’s Guide
18
2
17
1
12-13
16
0
12