EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 470

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

11
HcRhStatus
11-30
Universal Serial Bus Host Controller
EP93xx User’s Guide
CRWE
DRWE
31
15
Default:
Definition:
Bit Descriptions
Address:
Default:
Definition:
Bit Descriptions:
30
14
29
13
28
12
0x0000_0000
Describes the root hub.
RSVD:
DR:
PPCM:
0x8002_0050
0x0000_0000
Root hub status.
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
DeviceRemovable. Each bit is dedicated to a port of the
Root Hub. When cleared, the attached device is
removable. When set, the attached device is not
removable.
bit 0: Reserved
bit 1: Device attached to Port #1
bit 2: Device attached to Port #2
bit 3: Device attached to Port #3
PortPowerControlMask: Each bit indicates if a port is
affected by a global power control command when
PowerSwitchingMode is set. When set, the port’s power
state is only affected by per-port power control
(Set/ClearPortPower). When cleared, the port is controlled
by the global power switch (Set/ClearGlobalPower). If the
device is configured to global switching mode
(PowerSwitchingMode=0), this field is not valid.
bit 0: Reserved
bit 1: Ganged-power mask on Port #1
bit 2: Ganged-power mask on Port #2
bit 3: Ganged-power mask on Port #3
RSVD
RSVD
24
8
23
7
22
6
21
5
20
4
19
3
18
2
CCIC
OCI
17
1
DS785UM1
LPSC
LPS
16
0