EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 738

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

24
24-6
Pulse Width Modulator
EP93xx User’s Guide
Default:
Definition:
Bit Descriptions:
pwmout
PWM_INV = 0
pwmout
PWM_INV = 1
clk_pwm
0x0000_0000
PWMx Invert
RSVD:
INV:
t
1
t
off
on
PULSE 1
Figure 24-1. PWM_INV Example
Copyright 2007 Cirrus Logic
2
Reserved. Unknown During Read.
Invert PWM output
0 = Output is not inverted. PWMOUT will output t
then t
1 = Output is inverted. PWMOUT will output t
t
PWM_INV is double buffered to allow it to be programmed
statically (PWM is stopped) or dynamically (PWM is
running).
Programmed statically, the invert takes affect after the
APB write completes and CLK_PWM is running. After the
update, CLK_PWM can be turned off without affecting
PWMOUT. In this way, the PWM output can be inverted
without enabling the PWM.
Programmed dynamically, PWM_INV is updated at the
end of a PWM cycle to prevent any output glitches or
errors. Read/write accesses to PWM_INV will read/write
its buffer.
Figure 24-1
PWM_INV invert bit.
ON
t
t
off
on
, PWMxDutyCycle controls t
3
OFF
Duty Cycle =
Duty Cycle =
, PWMxDutyCycle controls t
4
provides an example of the effect of the
PULSE 2
t
t
on
off
/(t
/(t
5
on
on
+t
+t
off
off
)
)
6
OFF
7
PULSE 3
.
ON
8
OFF
9
ON
DS785UM1
first then
first