EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 759

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

TSSWLock
DS785UM1
31
15
Address:
Default:
Definition:
Bit Descriptions:
Table 25-2
the type of touch screen being used.
30
14
29
13
contains the values that must be loaded into the switch registers, depending on
28
12
SCTL:
0x8090_0020
0x0000_0000
Software lock register.
RSVD:
SWLCK:
RSVD
27
11
26
10
Copyright 2007 Cirrus Logic
25
9
Analog switch control values for the touch controller touch
detect, discharge, sample X, and sample Y states and
direct analog switch control when the touch screen
controller is disabled. A “1” indicates that the switch is
made or closed. A “0” indicates that the switch is open.
Reserved. Unknown during read.
Software lock bits.
WRITE: The Unlock value for this feature is 0xAA. Writing
0xAA to this register will unlock all locked registers until
the next block access. The ARM lock instruction prefix
should be used for the two consecutive write cycles when
writing to locked chip registers.
READ: During a read operation SWLCK[0] has the
following meaning:
1 = Unlocked for current bus access.
0 = Locked
The Read feature of the SWLOCK register is used for
testing the locking function. Since the software lock only
remains unlocked for the next block cycle, this test must
be performed on two consecutive cycles using the ARM
lock instruction prefix. The contents of SWLCK[7:1] are
unknown during a read operation.
24
8
RSVD
23
7
22
6
21
5
20
4
Analog Touch Screen Interface
SWLCK
19
3
EP93xx User’s Guide
18
2
17
1
25-21
16
0
25