EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 295

• Manufacturer Part Number: EP9302-IQZ
• Description: IC ARM9 SOC PROCESSOR 208LQFP
• Manufacturer: Cirrus Logic Inc
• Series: EP9r

Specifications of EP9302-IQZ

• Core Size: 16/32-Bit
• Core Processor: ARM9
• Speed: 200MHz
• Connectivity: EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
• Peripherals: AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
• Number Of I /o: 19
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 3.6 V
• Data Converters: A/D 5x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Controller Family/series: (ARM9)
• No. Of I/o's: 19
• Ram Memory Size: 16MB
• Cpu Speed: 200MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 1
• Digital Ic Case Style: LQFP
• Embedded Interface Type: AC97, I2S, SPI, UART, USB
• Rohs Compliant: Yes
• Processor Series: EP93xx
• Core: ARM920T
• Data Bus Width: 32 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: EDB9302A-Z
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1132 - KIT DEVELOPMENT EP9302 ARM9
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 598-1253

DS785UM1
ERROR:
INTEOI:
BG:
REMAP:
P2
0
1
1
1
1
P1
1
0
0
1
1
Table 8-23. Pixel Mode Encoding
Copyright 2007 Cirrus Logic
P0
1
0
1
0
1
Error Indicator - Read/Write
1 - Bus error has occurred
0 - No error.
Interrupt / End of Interrupt - Read/Write
Reading this bit returns the status of the Block Fill or Block
Copy function interrupt (active high):
‘1’ - Interrupt request. Indicates Block Fill or Block Copy
function has completed.
‘0’ - No interrupt request. Indicates Block Fill or Block
Copy function has not completed.
Writing ‘0’ to this bit will clear the interrupt request; writing
‘1’ to this bit will generate an interrupt request.
This bit may be used to cancel a ‘broken’ graphics function
that never completes. Masking the interrupt by writing
INTEN = ‘0’, and writing INTEOI = ‘1’ will halt the current
Graphics Accelerator function.
Background - Read/Write
When this bit is ‘0’ during remap (REMAP = ‘0’), source
image pixels that have a value of ‘0’ are unaffected
(transparent) when they are copied to the destination
image.
When this bit is ‘1’ during remap (REMAP = ‘1’), source
image pixels that have a value of ‘0’ are copied to the
destination image with the color value in the BG field of the
BACKGROUND
Reading this bit returns a valid value only when EN = '1'.
Pixel Expansion Mapping Function Enable - Read/Write
The value of REMAP enables or disables the Pixel
Expansion Mapping Function:
32 bits per pixel (24 bpp unpacked)
24 bits per pixel packed
16 bits per pixel
Pixel Mode
register.
not defined
not defined
Graphics Accelerator
EP93xx User’s Guide
8-31
8