EP9302-IQZ Cirrus Logic Inc, EP9302-IQZ Datasheet - Page 283

IC ARM9 SOC PROCESSOR 208LQFP

EP9302-IQZ

Manufacturer Part Number
EP9302-IQZ
Description
IC ARM9 SOC PROCESSOR 208LQFP
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets

Specifications of EP9302-IQZ

Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I&sup2:S, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
19
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
208-LQFP
Controller Family/series
(ARM9)
No. Of I/o's
19
Ram Memory Size
16MB
Cpu Speed
200MHz
No. Of Timers
3
No. Of Pwm Channels
1
Digital Ic Case Style
LQFP
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9302A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1132 - KIT DEVELOPMENT EP9302 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
 Details
Other names
598-1253

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9302-IQZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Part Number:
EP9302-IQZ
Manufacturer:
CIRRUS
Quantity:
20 000
DS785UM1
2. Setup Destination Memory
Address
0x000C
0x0000
0x0004
0x0008
0x0010
0x0014
A. Write the desired values to the SPEL field and the EPEL field in the
B. Write the word-aligned value of the SDRAM address ‘for the beginning of the copy
C. Write the line length value to the LEN field in the
D. Write the value of the WIDTH field to the
EPEL is the ending pixel position within the word that the pixel-copy will end with.
See
16-bits, the value for SPEL is (81 x 16)% 32 = 16 = 0x10 and the value for EPEL is
(105 x 16)% 32 = 16 = 0x10
bit pixels. So, LEN = 6 - 1 = 5 = 0x5.
SPEL is the starting pixel position within the word that the pixel-copy will begin with.
For example, if the image is to be copied to position (81, 105) and the pixel depth is
comprise the first scan line of the source image.
For example,
“DESTPIXELSTRT”
destination’ to the
where LEN is determined by:
specifies the number of 32-bit words, minus 1, that are needed to contain the pixels
that comprise the 1st scan line of the destination image. For an example, please
(1).Find how many pixels occupy a 32-bit word. For example, four 8-bit pixels can
(2).Find the width of the display in pixels. For example, a 640x480 display has a
(3).The line length, LEN, is determined by the stride of the display, that is, how
31
Section
width of 640 pixels.
many 32-bit words are needed to populate the width of the display with pixels.
From steps 1 and 2, the stride for this example is 640 pixels divided by 4,
where 4 is the number of 8-bit pixels that occupy a word. So, for this example,
line length is 640 divided by 4 = 160 = 0xA0.
occupy a 32-bit word.
Usually the same LEN value is used in both the
and the
P1
P2
P3
P5
P6
P7
8.5.2.
Table 8-21. Words Needed for Six 24-Bit Pixels
Table 8-21
“SRCLINELENGTH”
“BLKDESTSTRT”
24 23
register.
Copyright 2007 Cirrus Logic
shows that six 32-bit words are needed to contain six 24-
P0
P2
P3
P4
P6
P7
register.
register.
16 15
“BLKDESTWIDTH”
P0
P1
P3
P4
P5
P7
“DESTLINELENGTH”
“DESTLINELENGTH”
8 7
register, where WIDTH
P0
P1
P2
P4
P5
P6
Graphics Accelerator
EP93xx User’s Guide
0
register,
register
8-19
8

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