PIC18C658-I/L Microchip Technology, PIC18C658-I/L Datasheet - Page 66

• Manufacturer Part Number: PIC18C658-I/L
• Description: IC PIC MCU OTP 16KX16 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/L

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Number Of I /o: 52
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFPAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658IL; Q1162292

PIC18CXX8
5.1
Several control registers are used in conjunction with
the TBLRD and TBLWT instructions. These include:
• RCON register
• TABLAT register
• TBLPTR registers
REGISTER 5-1: RCON REGISTER (ADDRESS: 0xFD0h)
DS30475A-page 66
Control Registers
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
IPEN: Interrupt Priority Enable
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (16CXXX compatibility mode)
LWRT: Long Write Enable
1 = Enable TBLWT to internal program memory
0 = Disable TBLWT to internal program memory.
Unimplemented: Read as '0'
RI: RESET Instruction Flag bit
1 = No RESET instruction occurred
0 = A RESET instruction occurred
TO: Time-out bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = No Power-on Reset occurred
0 = A Power-on Reset occurred (must be set in software after a Power-on Reset occurs)
BOR: Brown-out Reset Status bit
1 = No Brown-out Reset nor POR Reset occurred
0 = A Brown-out Reset or POR Reset occurred
Legend:
R = Readable bit
- n = Value at POR
bit 7
R/W-0
Note 1: Only cleared on a POR or MCLR reset.
IPEN
(must be set in software after a Brown-out Reset occurs)
This bit has no effect on TBLWTs to external program memory.
R/W-0
LWRT
Advanced Information
U-0
W = Writable bit
’1’ = Bit is set
—
R/W-1
5.1.1
The LWRT bit specifies the operation of Table Writes to
internal memory when the V
MCLR pin. When the LWRT bit is set, the controller
continues to execute user code, but long table writes
are allowed (for programming internal program mem-
ory) from user mode. The LWRT bit can be cleared only
by performing either a POR or MCLR Reset.
RI
RCON REGISTER
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
R/W-1
TO
R/W-1
 2000 Microchip Technology Inc.
PD
PP
voltage is applied to the
x = Bit is unknown
R/W-0
POR
R/W-0
BOR
bit 0