PIC18C658-I/L Microchip Technology, PIC18C658-I/L Datasheet - Page 334

• Manufacturer Part Number: PIC18C658-I/L
• Description: IC PIC MCU OTP 16KX16 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/L

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Number Of I /o: 52
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFPAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658IL; Q1162292

PIC18CXX8
FIGURE 25-17: I
TABLE 25-16: I
DS30475A-page 334
100
101
102
103
90
91
106
107
92
109
110
D102
Note 1:
Param.
No.
2:
T
T
T
T
T
T
T
T
T
T
T
Cb
As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region (min. 300 ns) of
the falling edge of SCL to avoid unintended generation of START or STOP conditions.
A fast mode I
then be met. This will automatically be the case if the device does not stretch the LOW period of the SCL signal. If such a
device does stretch the LOW period of the SCL signal, it must output the next data bit to the SDA line.
Before the SCL line is released, T
specification).
SDA
Out
SDA
In
SU
SU
SU
AA
SCL
Symbol
HIGH
LOW
R
F
HD
HD
BUF
:
:
:
:
:
STA
DAT
STO
STA
DAT
Note: Refer to Figure 25-4 for load conditions .
2
2
C BUS DATA TIMING
C BUS DATA REQUIREMENTS (SLAVE MODE)
Clock high time
Clock low time
SDA and SCL rise
time
SDA and SCL fall
time
START condition
setup time
START condition hold
time
Data input hold time
Data input setup time 100 kHz mode
STOP condition
setup time
Output valid from
clock
Bus free time
Bus capacitive loading
2
C bus device can be used in a standard mode I
90
103
91
Characteristic
109
R
max. + tsu;DAT = 1000 + 250 = 1250 ns (according to the standard mode I
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
SSP module
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
Advanced Information
100
106
101
109
20 + 0.1Cb
20 + 0.1Cb
1.5T
1.5T
107
Min
250
100
2
4.0
0.6
4.7
1.3
4.7
0.6
4.0
0.6
4.7
0.6
4.7
1.3
—
—
—
—
—
C bus system, but the requirement tsu;DAT
0
0
CY
CY
1000
3500
Max
300
300
300
0.9
400
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Units
ns
ns
pF
ns
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s
s
s
2000 Microchip Technology Inc.
PIC18CXX8 must operate at a
minimum of 1.5 MHz
PIC18CXX8 must operate at a
minimum of 10 MHz
PIC18CXX8 must operate at a
minimum of 1.5 MHz
PIC18CXX8 must operate at a
minimum of 10 MHz
Cb is specified to be from
10 to 400 pF
Cb is specified to be from
10 to 400 pF
Only relevant for repeated
START condition
After this period the first clock
pulse is generated
(Note 2)
(Note 1)
Time the bus must be free
before a new transmission can
start
92
102
110
Conditions
250 ns must
2
C bus