PIC18C658-I/L Microchip Technology, PIC18C658-I/L Datasheet - Page 47

• Manufacturer Part Number: PIC18C658-I/L
• Description: IC PIC MCU OTP 16KX16 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/L

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Number Of I /o: 52
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFPAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658IL; Q1162292

4.7.1
The PIC18CXX8 devices have 4 two word instructions:
MOVFF, CALL, GOTO and LFSR. The second word of
these instructions has the 4 MSB’s set to 1’s and is a
special kind of NOP instruction. The lower 12 bits of the
second word contain data to be used by the instruction.
If the first word of the instruction is executed, the data
in the second word is accessed. If the second word of
the instruction is executed by itself (first word was
skipped), it will execute as a NOP. This action is neces-
sary when the two word instruction is preceded by a
conditional instruction that changes the PC. A program
example that demonstrates this concept is shown in
Example 4-3. Refer to Section 19.0 for further details of
the instruction set.
4.8
Lookup tables are implemented two ways. These are:
• Computed GOTO
• Table Reads
EXAMPLE 4-3:
 2000 Microchip Technology Inc.
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
0110 0110 0000 0000
1100 0001 0010 0011
1111 0100 0101 0110
0010 0100 0000 0000
Object Code
Object Code
TWO WORD INSTRUCTIONS
Lookup Tables
TWO WORD INSTRUCTIONS
TSTFSZ
MOVFF
ADDWF
TSTFSZ
MOVFF
ADDWF
Advanced Information
REG1
REG1, REG2 ; No, execute 2-word instruction
REG3
REG1
REG1, REG2 ; Yes
REG3
CASE 1:
CASE 2:
; is RAM location 0?
; 2nd operand holds address of REG2
; continue code
; is RAM location 0?
; 2nd operand becomes NOP
; continue code
4.8.1
A computed GOTO is accomplished by adding an offset
to the program counter (ADDWF PCL).
A lookup table can be formed with an ADDWF
instruction and a group of RETLW 0xnn instructions.
WREG is loaded with an offset into the table before exe-
cuting a call to that table. The first instruction of the called
routine is the ADDWF PCL instruction. The next instruc-
tion executed will be one of the RETLW 0xnn instruc-
tions that returns the value 0xnn to the calling function.
The offset value (value in WREG) specifies the number
of bytes that the program counter should advance.
In this method, only one data byte may be stored in
each instruction location and room on the return
address stack is required.
4.8.2
A better method of storing data in program memory
allows 2 bytes of data to be stored in each instruction
location.
Lookup table data may be stored as 2 bytes per pro-
gram word by using table reads and writes. The table
pointer (TBLPTR) specifies the byte address and the
table latch (TABLAT) contains the data that is read
from, or written to, program memory. Data is trans-
ferred to/from program memory one byte at a time.
A description of the Table Read/Table Write operation
is shown in Section 5.0.
Warning:
Source Code
Source Code
COMPUTED GOTO
TABLE READS/TABLE WRITES
The LSb of PCL is fixed to a value of ‘0’.
Hence, computed GOTO to an odd
address is not possible.
PIC18CXX8
DS30475A-page 47
PCL