PIC18C658-I/L Microchip Technology, PIC18C658-I/L Datasheet - Page 219

• Manufacturer Part Number: PIC18C658-I/L
• Description: IC PIC MCU OTP 16KX16 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/L

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Number Of I /o: 52
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFPAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658IL; Q1162292

17.7.1
The Time Quanta is a fixed unit of time derived from the
oscillator period. There is a programmable baud rate
prescaler, with integral values ranging from 1 to 64, in
addition to a fixed divide by two for clock generation.
EXAMPLE 17-2: CALCULATION FOR
EXAMPLE 17-3: CALCULATION FOR
EXAMPLE 17-4: CALCULATION FOR
The frequencies of the oscillators in the different nodes
must be coordinated in order to provide a system-wide
specified nominal bit time. This means that all oscilla-
tors must have a T
should also be noted that although the number of T
programmable from 4 to 25, the usable minimum is
8 T
anteed to operate correctly.
17.7.2
This part of the bit time is used to synchronize the var-
ious CAN nodes on the bus. The edge of the input sig-
nal is expected to occur during the sync segment. The
duration is 1 T
17.7.3
This part of the bit time is used to compensate for phys-
ical delay times within the network. These delay times
consist of the signal propagation time on the bus line
and the internal delay time of the nodes. The length of
the Propagation Segment can be programmed from
1 T
If Fosc = 16 MHz, BRP<5:0> = 00h, and Nominal Bit
Time = 8 T
Rate = 1 Mb/s
If F
Time = 8 T
Rate = 625 Kb/s
If Fosc = 25 MHz, BRP<5:0> = 3Fh, and Nominal Bit
Time = 25 T
Rate = 7.8 Kb/s
2000 Microchip Technology Inc.
Q
Q
OSC
. A bit time of less than 8 T
to 8 T
= 20 MHz, BRP<5:0> = 01h, and Nominal Bit
TIME QUANTA
SYNCHRONIZATION SEGMENT
PROPAGATION SEGMENT
Q
Q
Q
by setting the PRSEG2:PRSEG0 bits.
Q
; then T
; then T
Q
; then T
.
OSC
F
F
F
OSC
OSC
OSC
Q
Q
Q
that is a integral divisor of T
= 125 nsec and Nominal Bit
= 5.12 usec and Nominal Bit
= 200nsec and Nominal Bit
= 16MHz
= 20MHz
= 25MHz
Q
in length is not guar-
Advanced Information
Q
Q
. It
is
17.7.4
The Phase Buffer Segments are used to optimally locate
the sampling point of the received bit, within the nominal
bit time. The sampling point occurs between phase seg-
ment 1 and phase segment 2. These segments can be
lengthened or shortened by the resynchronization pro-
cess. The end of phase segment 1 determines the sam-
pling point within a bit time. Phase segment 1 is
programmable from 1 T
ment 2 provides delay before the next transmitted data
transition and is also programmable from 1 T
duration (however, due to IPT requirements the actual
minimum length of phase segment 2 is 2 T
defined to be equal to the greater of phase segment 1 or
the Information Processing Time (IPT) ).
17.7.5
The Sample Point is the point of time at which the bus
level is read and value of the received bit is determined.
The sampling point occurs at the end of phase
segment 1. If the bit timing is slow and contains many
T
line at the sample point. The value of the received bit is
determined to be the value of the majority decision of
three values. The three samples are taken at the sam-
ple point, and twice before with a time of T
each sample.
17.7.6
The Information Processing Time (IPT) is the time seg-
ment, starting at the sample point, that is reserved for
calculation of the subsequent bit level. The CAN speci-
fication defines this time to be less than or equal to 2 T
The PIC18CXX8 defines this time to be 2 T
phase segment 2 must be at least 2 T
Q
, it is possible to specify multiple sampling of the bus
PHASE BUFFER SEGMENTS
SAMPLE POINT
INFORMATION PROCESSING TIME
Q
PIC18CXX8
to 8 T
Q
in duration. Phase seg-
DS30475A-page 219
Q
long.
Q
, or it may be
Q
Q
/2
to 8 T
between
Q
. Thus,
Q
Q
in
.