PIC18C658-I/L Microchip Technology, PIC18C658-I/L Datasheet - Page 30

• Manufacturer Part Number: PIC18C658-I/L
• Description: IC PIC MCU OTP 16KX16 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/L

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Number Of I /o: 52
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFPAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658IL; Q1162292

PIC18CXX8
3.1
A Power-on Reset pulse is generated on-chip when a
V
cuitry, connect the MCLR pin directly (or through a
resistor) to V
nents usually needed to create a Power-on Reset
delay. A minimum rise rate for V
eter D004). For a slow rise time, see Figure 3-2.
When the device starts normal operation (exits the
RESET condition), device operating parameters (volt-
age, frequency, temperature,...) must be met to ensure
operation. If these conditions are not met, the device
must be held in RESET until the operating conditions
are met. Brown-out Reset may be used to meet the
voltage start-up condition.
FIGURE 3-2:
DS30475A-page 30
Note 1: External Power-on Reset circuit is required
DD
rise is detected. To take advantage of the POR cir-
2: R < 40 kΩ is recommended to make sure
3: R1 = 100Ω to 1 kΩ will limit any current
Power-on Reset (POR)
only if the V
The diode D helps discharge the capacitor
quickly when V
that the voltage drop across R does not
violate the device’s electrical specification.
flowing into MCLR from external capacitor
C in the event of MCLR/V
down due to Electrostatic Discharge
(ESD) or Electrical Overstress (EOS).
D
DD
. This will eliminate external RC compo-
V
DD
EXTERNAL POWER-ON
RESET CIRCUIT (FOR SLOW
V
R
DD
C
DD
POWER-UP)
power-up slope is too slow.
DD
R1
powers down.
DD
PIC18CXX8
MCLR
is specified (param-
PP
pin break-
Advanced Information
3.2
The Power-up Timer provides a fixed nominal time-out
(parameter #33), only on power-up from the POR. The
Power-up Timer operates on an internal RC oscillator.
The chip is kept in RESET as long as the PWRT is
active. The PWRT’s time delay allows V
acceptable level. A configuration bit (PWRTEN in
CONFIG2L register) is provided to enable/disable the
PWRT.
The power-up time delay will vary from chip to chip due
to V
parameter #33 for details.
3.3
The Oscillator Start-up Timer (OST) provides 1024
oscillator cycle (from OSC1 input) delay after the
PWRT delay is over (parameter #32). This ensures that
the crystal oscillator or resonator has started and stabi-
lized.
The OST time-out is invoked only for XT, LP, HS and
HS4 modes and only on Power-on Reset or wake-up
from SLEEP.
3.4
With the PLL enabled, the time-out sequence following
a Power-on Reset is different from other oscillator
modes. A portion of the Power-up Timer is used to pro-
vide a fixed time-out that is sufficient for the PLL to lock
to the main oscillator frequency. This PLL lock time-out
(T
start-up time-out (OST).
3.5
A
clear/programmed) or enable (if set) the Brown-out
Reset circuitry. If V
greater than parameter #35, the brown-out situation
resets the chip. A RESET may not occur if V
below parameter D005 for less than parameter #35.
The chip will remain in Brown-out Reset until V
above BV
and will keep the chip in RESET an additional time
delay (parameter #33). If V
the Power-up Timer is running, the chip will go back
into a Brown-out Reset and the Power-up Timer will be
initialized. Once V
Timer will execute the additional time delay.
PLL
configuration
DD
) is typically 2 ms and follows the oscillator
, temperature and process variation. See DC
Power-up Timer (PWRT)
Oscillator Start-up Timer (OST)
PLL Lock Time-out
Brown-out Reset (BOR)
DD
. The Power-up Timer will then be invoked
DD
DD
bit,
rises above BV
falls below parameter D005 for
 2000 Microchip Technology Inc.
BOREN,
DD
drops below BV
can
DD
DD
, the Power-up
to rise to an
disable
DD
DD
DD
while
rises
falls
(if