PIC18C658-I/L Microchip Technology, PIC18C658-I/L Datasheet - Page 210

IC PIC MCU OTP 16KX16 68PLCC

PIC18C658-I/L

Manufacturer Part Number
PIC18C658-I/L
Description
IC PIC MCU OTP 16KX16 68PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr

Specifications of PIC18C658-I/L

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Core Processor
PIC
Speed
40MHz
Connectivity
CAN, I²C, SPI, UART/USART
Number Of I /o
52
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Controller Family/series
PIC18
No. Of I/o's
52
Ram Memory Size
1.5KB
Cpu Speed
40MHz
No. Of Timers
4
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1536 B
Interface Type
3-Wire, I2C, SPI, USART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
52
Number Of Timers
4 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163007, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
6
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFPAC174007 - MODULE SKT PROMATEII 68PLCC
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
PIC18C658IL
Q1162292

Available stocks

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Quantity
Price
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PIC18CXX8
17.3
The PIC18CXX8 has the following modes of operation.
These modes are:
• Configuration mode
• Disable mode
• Normal Operation mode
• Listen Only mode
• Loopback mode
• Error Recognition mode (selected through
Modes are requested by setting the REQOP bits,
except the Error Recognition mode, which is requested
through the CANRXM bits. Entry into a mode is
acknowledged by monitoring the OPMODE bits.
When changing modes, the mode will not actually
change until all pending message transmissions are
complete. Because of this, the user must verify that the
device has actually changed into the requested mode
before further operations are executed.
17.3.1
The CAN module has to be initialized before the activa-
tion. This is only possible if the module is in the Config-
uration mode. The Configuration mode is requested by
setting REQOP2 bit. Only when the status bit
OPMODE2 has a high level, the initialization can be
performed. Afterwards, the configuration registers and
the acceptance mask registers and the acceptance fil-
ter registers can be written. The module is activated by
setting the control bits CFGREQ to zero.
The module will protect the user from accidentally vio-
lating the CAN protocol through programming errors.
All registers which control the configuration of the mod-
ule can not be modified while the module is on-line.
The CAN module will not be allowed to enter the Con-
figuration mode while a transmission is taking place.
The CONFIG bit serves as a lock to protect the follow-
ing registers.
• Configuration registers
• Bus Timing registers
• Identifier Acceptance Filter registers
• Identifier Acceptance Mask registers
In the Configuration mode, the module will not transmit
or receive. The error counters are cleared and the inter-
rupt flags remain unchanged. The programmer will
have access to configuration registers that are access
restricted in other modes.
DS30475A-page 210
CANRXM bits)
CAN Modes of Operation
CONFIGURATION MODE
Advanced Information
17.3.2
In Disable mode, the module will not transmit or
receive. The module has the ability to set the WAKIF bit
due to bus activity, however, any pending interrupts will
remain and the error counters will retain their value.
If REQOP<2:0> is set to 001, the module will enter the
module Disable mode. This mode is similar to dis-
abling other peripheral modules by turning off the mod-
ule enables. This causes the module internal clock to
stop unless the module is active (i.e., receiving or
transmitting a message). If the module is active, the
module will wait for 11 recessive bits on the CAN bus,
detect that condition as an idle bus, then accept the
module disable command. OPMODE<2:0>=001 indi-
cates whether the module successfully went into mod-
ule Disable mode
The WAKIF interrupt is the only module interrupt that is
still active in the module Disable mode. If the WAKIE is
set, the processor will receive an interrupt whenever
the CAN bus detects a dominant state, as occurs with
a SOF.
The I/O pins will revert to normal I/O function when the
module is in the module Disable mode.
17.3.3
This is the standard operating mode of the
PIC18CXX8. In this mode, the device actively monitors
all bus messages and generates acknowledge bits,
error frames, etc. This is also the only mode in which
the PIC18CXX8 will transmit messages over the CAN
bus.
17.3.4
Listen Only mode provides a means for the
PIC18CXX8 to receive all messages, including mes-
sages with errors. This mode can be used for bus mon-
itor applications, or for detecting the baud rate in ‘hot
plugging’ situations. For auto-baud detection, it is nec-
essary that there are at least two other nodes which are
communicating with each other. The baud rate can be
detected empirically by testing different values until
valid messages are received. The Listen Only mode is
a silent mode, meaning no messages will be transmit-
ted while in this state, including error flags or acknowl-
edge signals. The filters and masks can be used to
allow only particular messages to be loaded into the
receive registers, or the filter masks can be set to all
zeros to allow a message with any identifier to pass.
The error counters are reset and deactivated in this
state. The Listen Only mode is activated by setting the
mode request bits in the CANCON register.
DISABLE MODE
NORMAL MODE
LISTEN ONLY MODE
2000 Microchip Technology Inc.

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