PIC18C658-I/L Microchip Technology, PIC18C658-I/L Datasheet - Page 280

• Manufacturer Part Number: PIC18C658-I/L
• Description: IC PIC MCU OTP 16KX16 68PLCC
• Manufacturer: Microchip Technology
• Series: PIC® 18Cr

Specifications of PIC18C658-I/L

• Core Size: 8-Bit
• Program Memory Size: 32KB (16K x 16)
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: CAN, I²C, SPI, UART/USART
• Number Of I /o: 52
• Program Memory Type: OTP
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Controller Family/series: PIC18
• No. Of I/o's: 52
• Ram Memory Size: 1.5KB
• Cpu Speed: 40MHz
• No. Of Timers: 4
• Processor Series: PIC18C
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 1536 B
• Interface Type: 3-Wire, I2C, SPI, USART, CAN
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4 bit
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: ICE2000, DM163007, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC164308 - MODULE SKT FOR PM3 68PLCCDVA18PQ640 - DEVICE ADAPT PIC18C658 64-TQFPAC174007 - MODULE SKT PROMATEII 68PLCC
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: PIC18C658IL; Q1162292

PIC18CXX8
DAW
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example1:
Example 2:
DS30475A-page 280
Before Instruction
After Instruction
Before Instruction
After Instruction
Decode
Q1
WREG
C
DC
WREG
C
DC
WREG
C
DC
WREG
C
DC
register WREG
=
=
=
=
=
=
=
=
=
=
=
=
Decimal Adjust WREG Register
[label] DAW
None
If [WREG<3:0> >9] or [DC = 1]
then
(WREG<3:0>) + 6
else
(
If [WREG<7:4> >9] or [C = 1] then
(
else
(WREG<7:4>)
C
DAW adjusts the eight bit value in
WREG resulting from the earlier
addition of two variables (each in
packed BCD format) and produces
a correct packed BCD result.
1
1
DAW
Read
WREG<3:0>)
WREG<7:4>) + 6
Q2
0000
0xA5
0
0
0x05
1
0
0xCE
0
0
0x34
1
0
0000
Process
Data
Q3
WREG<7:4>;
W<3:0>;
0000
W<3:0>;
WREG<7:4>;
Advanced Information
WREG
Write
Q4
0111
DECF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Q Cycle Activity:
Example:
Before Instruction
After Instruction
Decode
CNT
Z
CNT
Z
Q1
=
=
=
=
register ’f’
Decrement f
[ label ] DECF f [ ,d [,a] ]
0
d
a
(f) – 1
C,DC,N,OV,Z
Decrement register 'f'. If 'd' is 0, the
result is stored in WREG. If 'd' is 1,
the result is stored back in register
'f' (default). If ’a’ is 0, the Access
Bank will be selected, overriding
the BSR value. If ’a’ is 1, the Bank
will be selected as per the BSR
value.
1
1
DECF
Read
0000
Q2
0x01
0
0x00
1
f
[0,1]
[0,1]
2000 Microchip Technology Inc.
255
dest
CNT
01da
Process
Data
Q3
ffff
destination
Write to
Q4
ffff