PIC12F675T-I/SN Microchip Technology, PIC12F675T-I/SN Datasheet - Page 44

• Manufacturer Part Number: PIC12F675T-I/SN
• Description: IC MCU CMOS 1K FLASH W/AD 8-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F675T-I/SN

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC12F675-I/SNTR; PIC12F675-I/SNTR; PIC12F675T-I/SN; PIC12F675T-I/SNTR; Q1324216

PIC12F629/675
TABLE 7-1:
7.1.5
The A/D conversion is initiated by setting the
GO/DONE bit (ADCON0<1>). When the conversion is
complete, the A/D module:
• Clears the GO/DONE bit
• Sets the ADIF flag (PIR1<6>)
• Generates an interrupt (if enabled)
If the conversion must be aborted, the GO/DONE bit
can be cleared in software. The ADRESH:ADRESL
registers will not be updated with the partially complete
A/D
ADRESH:ADRESL registers will retain the value of the
FIGURE 7-2:
DS41190G-page 44
Legend: Shaded cells are outside of recommended range.
Note 1: The A/D RC source has a typical T
Operation
16 T
32 T
64 T
A/D RC
(ADFM =
(ADFM =
2 T
4 T
8 T
A/D Clock Source (T
2: These values violate the minimum required T
3: For faster conversion times, the selection of another clock source is recommended.
4: When the device frequency is greater than 1 MHz, the A/D RC clock source is only recommended if the
OSC
OSC
OSC
OSC
OSC
OSC
conversion
conversion will be performed during Sleep.
STARTING A CONVERSION
0
1
)
)
T
ADCS2:ADCS0
AD
MSB
10-BIT A/D RESULT FORMAT
Bit 7
Bit 7
vs. DEVICE OPERATING FREQUENCIES
000
100
001
101
010
110
x11
sample.
Unimplemented: Read as ‘
AD
)
Instead,
ADRESH
2 - 6 s
100 ns
200 ns
400 ns
800 ns
20 MHz
1.6 s
3.2 s
10-bit A/D Result
AD
(1,4)
time of 4 s for V
(2)
(2)
(2)
(2)
0’
the
MSB
AD
time.
Bit 0
Bit 0
2 - 6 s
12.8 s
400 ns
800 ns
previous conversion. After an aborted conversion, a
2 T
be initiated. Following the delay, an input acquisition is
automatically started on the selected channel.
7.1.6
The A/D conversion can be supplied in two formats: left
or right shifted. The ADFM bit (ADCON0<7>) controls
the output format. Figure 7-2 shows the output formats.
5 MHz
1.6 s
3.2 s
6.4 s
DD
Note:
AD
Device Frequency
> 3.0V.
(1,4)
(2)
(2)
(3)
delay is required before another acquisition can
Bit 7
Bit 7
The GO/DONE bit should not be set in the
same instruction that turns on the A/D.
CONVERSION OUTPUT
10-bit A/D Result
LSB
2 - 6 s
16.0 s
500 ns
1.0 s
8.0 s
4 MHz
2.0 s
4.0 s
Unimplemented: Read as ‘
 2010 Microchip Technology Inc.
ADRESL
(2)
(3)
(1,4)
(2)
(3)
2 - 6 s
1.25 MHz
12.8 s
25.6 s
51.2 s
1.6 s
3.2 s
6.4 s
0
Bit 0
Bit 0
LSB
(1,4)
’
(3)
(3)
(3)