PIC12F675T-I/SN Microchip Technology, PIC12F675T-I/SN Datasheet - Page 11

• Manufacturer Part Number: PIC12F675T-I/SN
• Description: IC MCU CMOS 1K FLASH W/AD 8-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F675T-I/SN

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC12F675-I/SNTR; PIC12F675-I/SNTR; PIC12F675T-I/SN; PIC12F675T-I/SNTR; Q1324216

TABLE 2-1:
 2010 Microchip Technology Inc.
Bank 0
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
Legend:
Note 1: This is not a physical register.
Address
2: These bits are reserved and should always be maintained as ‘
3: PIC12F675 only.
INDF
TMR0
PCL
STATUS
FSR
GPIO
PCLATH
INTCON
PIR1
TMR1L
TMR1H
T1CON
CMCON
ADRESH
ADCON0
shaded = unimplemented
— = unimplemented locations read as ‘
Name
(1)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
(3)
(3)
SPECIAL FUNCTION REGISTERS SUMMARY
Addressing this Location uses Contents of FSR to Address Data Memory
Timer0 Module’s Register
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Holding Register for the Least Significant Byte of the 16-bit Timer1
Holding Register for the Most Significant Byte of the 16-bit Timer1
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Most Significant 8 bits of the Left Shifted A/D Result or 2 bits of the Right Shifted Result
ADFM
IRP
Bit 7
EEIF
GIE
—
—
—
—
(2)
TMR1GE
COUT
RP1
VCFG
Bit 6
PEIE
ADIF
—
—
(2)
T1CKPS1
GPIO5
Bit 5
T0IE
RP0
0
—
—
—
—
’, u = unchanged, x = unknown, q = value depends on condition,
Write Buffer for Upper 5 bits of Program Counter
T1CKPS0 T1OSCEN
GPIO4
CINV
INTE
Bit 4
TO
—
—
GPIO3
CHS1
GPIE
CMIF
Bit 3
CIS
0
PD
’.
T1SYNC
GPIO2
CHS0
CM2
Bit 2
T0IF
—
Z
PIC12F629/675
GO/DONE
TMR1CS
GPIO1
CM1
Bit 1
INTF
DC
—
TMR1ON
TMR1IF
GPIO0
ADON
GPIF
CM0
Bit 0
C
DS41190G-page 11
0000 0000
xxxx xxxx
0000 0000
0001 1xxx
xxxx xxxx
--xx xxxx
---0 0000
0000 0000
00-- 0--0
xxxx xxxx
xxxx xxxx
-000 0000
-0-0 0000
xxxx xxxx
00-- 0000
POR, BOD
Value on
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
20,61
45,61
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35
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