PIC12F675T-I/SN Microchip Technology, PIC12F675T-I/SN Datasheet - Page 104

• Manufacturer Part Number: PIC12F675T-I/SN
• Description: IC MCU CMOS 1K FLASH W/AD 8-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F675T-I/SN

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC12F675-I/SNTR; PIC12F675-I/SNTR; PIC12F675T-I/SN; PIC12F675T-I/SNTR; Q1324216

PIC12F629/675
FIGURE 12-10:
TABLE 12-9:
DS41190G-page 104
130
130
131
132
134
Note 1: ADRES register may be read on the following T
Param
No.
Note 1: If the A/D clock source is selected as RC, a time of T
* These parameters are characterized but not tested.
† Data in “Typ” column is at 5.0V, 25C unless otherwise stated. These parameters are for design guidance only
A/D DATA
2: See Section 7.1 “A/D Configuration and Operation” for minimum conditions.
SAMPLE
A/D CLK
BSF ADCON0, GO
and are not tested.
ADRES
T
T
T
T
T
ADIF
Sym
AD
CNV
ACQ
AD
GO
GO
SLEEP instruction to be executed.
Q4
134
PIC12F675 A/D CONVERSION REQUIREMENTS
A/D Clock Period
A/D Internal RC
Oscillator Period
Conversion Time
(not including
Acquisition Time)
Acquisition Time
Q4 to A/D Clock
Start
132
Characteristic
PIC12F675 A/D CONVERSION TIMING (NORMAL MODE)
(T
(1)
OSC
/2)
(Note 2)
(1)
Min
3.0*
3.0*
2.0*
9
1.6
—
—
5*
OLD_DATA
8
T
Typ†
OSC
11.5
6.0
4.0
SAMPLING STOPPED
—
—
11
—
131
7
CY
/2
CY
cycle.
is added before the A/D clock starts. This allows the
6
Max
130
9.0*
6.0*
—
—
—
—
—
—
3
Units
T
s
s
s
s
s
s
—
AD
2
T
T
ADCS<1:0> = 11 (RC mode)
At V
At V
Set GO bit to new data in A/D result
register
The minimum time is the amplifier
settling time. This may be used if the
“new” input voltage has not changed
by more than 1 LSb (i.e., 4.1 mV @
4.096V) from the last sampled
voltage (as stored on C
If the A/D clock source is selected as
RC, a time of T
the A/D clock starts. This allows the
SLEEP instruction to be executed.
OSC
OSC
1
DD
DD
based, V
based, V
 2010 Microchip Technology Inc.
= 2.5V
= 5.0V
0
Conditions
REF
REF
CY
NEW_DATA
DONE
1 T
is added before
3.0V
full range
CY
1 T
CY
HOLD
).