PIC12F675T-I/SN Microchip Technology, PIC12F675T-I/SN Datasheet - Page 37

• Manufacturer Part Number: PIC12F675T-I/SN
• Description: IC MCU CMOS 1K FLASH W/AD 8-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F675T-I/SN

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC12F675-I/SNTR; PIC12F675-I/SNTR; PIC12F675T-I/SN; PIC12F675T-I/SNTR; Q1324216

6.0
The PIC12F629/675 devices have one analog
comparator. The inputs to the comparator are
multiplexed with the GP0 and GP1 pins. There is an
on-chip Comparator Voltage Reference that can also
be applied to an input of the comparator. In addition,
GP2 can be configured as the comparator output.
REGISTER 6-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2-0
U-0
—
COMPARATOR MODULE
Unimplemented: Read as ‘0’
COUT: Comparator Output bit
When CINV = 0:
1 = V
0 = V
When CINV = 1:
1 = V
0 = V
Unimplemented: Read as ‘0’
CINV: Comparator Output Inversion bit
1 = Output inverted
0 = Output not inverted
CIS: Comparator Input Switch bit
When CM2:CM0 = 110 or 101:
1 = V
0 = V
CM2:CM0: Comparator Mode bits
Figure 6-2 shows the Comparator modes and CM2:CM0 bit settings
COUT
R-0
IN
IN
IN
IN
IN
IN
CMCON: COMPARATOR CONTROL REGISTER (ADDRESS: 19h)
+ > V
+ < V
+ < V
+ > V
- connects to CIN+
- connects to CIN-
IN
IN
IN
IN
-
-
-
-
W = Writable bit
‘1’ = Bit is set
U-0
—
R/W-0
CINV
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
The Comparator Control Register (CMCON), shown
in Register 6-1, contains the bits to control the
comparator.
CIS
R/W-0
CM2
PIC12F629/675
x = Bit is unknown
R/W-0
CM1
DS41190G-page 37
R/W-0
CM0
bit 0