PIC12F675T-I/SN Microchip Technology, PIC12F675T-I/SN Datasheet - Page 25
PIC12F675T-I/SN
Manufacturer Part Number
PIC12F675T-I/SN
Description
IC MCU CMOS 1K FLASH W/AD 8-SOIC
Manufacturer
Microchip Technology
Series
PIC® 12Fr
Datasheets
1.PIC12F629T-ISN.pdf
(136 pages)
2.PIC12F629T-ISN.pdf
(8 pages)
3.PIC12F629T-ISN.pdf
(24 pages)
Specifications of PIC12F675T-I/SN
Core Size
8-Bit
Program Memory Size
1.75KB (1K x 14)
Core Processor
PIC
Speed
20MHz
Peripherals
POR, WDT
Number Of I /o
5
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Controller Family/series
PIC12
No. Of I/o's
6
Eeprom Memory Size
128Byte
Ram Memory Size
64Byte
Cpu Speed
20MHz
No. Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Connectivity
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
PIC12F675-I/SNTR
PIC12F675-I/SNTR
PIC12F675T-I/SN
PIC12F675T-I/SNTR
Q1324216
PIC12F675-I/SNTR
PIC12F675T-I/SN
PIC12F675T-I/SNTR
Q1324216
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC12F675T-I/SN
Manufacturer:
MICROCHIP
Quantity:
44 520
Company:
Part Number:
PIC12F675T-I/SN
Manufacturer:
MICROCHIPS-PB
Quantity:
3 170
3.3.3
Figure 3-2 shows the diagram for this pin. The GP2 pin
is configurable to function as one of the following:
• a general purpose I/O
• an analog input for the A/D (PIC12F675 only)
• the clock input for TMR0
• an external edge triggered interrupt
• a digital output from the comparator
FIGURE 3-2:
2010 Microchip Technology Inc.
TRISIO
Data Bus
PORT
PORT
Interrupt-on-Change
WPU
WPU
TRISIO
IOC
IOC
WR
WR
WR
WR
RD
RD
RD
RD
D
D
D
D
To TMR0
To INT
To A/D Converter
CK
CK
CK
CK
GP2/AN2/T0CKI/INT/COUT
Q
Q
Q
Q
Q
Q
Q
Q
Input Mode
BLOCK DIAGRAM OF GP2
Analog
Enable
COUT
COUT
GPPU
Input Mode
Analog
RD PORT
1
0
Q
Q
Analog
Mode
Input
EN
EN
D
D
V
DD
Weak
V
V
DD
SS
I/O pin
3.3.4
Figure 3-3 shows the diagram for this pin. The GP3 pin
is configurable to function as one of the following:
• a general purpose input
• as Master Clear Reset
FIGURE 3-3:
Data Bus
PORT
Interrupt-on-Change
IOC
TRISIO
IOC
WR
RD
RD
RD
D
CK
GP3/MCLR/V
PIC12F629/675
Q
Q
Reset
BLOCK DIAGRAM OF GP3
V
SS
PP
RD PORT
MCLRE
Q
Q
MCLRE
EN
EN
DS41190G-page 25
D
D
V
SS
I/O pin