PIC12F675T-I/SN Microchip Technology, PIC12F675T-I/SN Datasheet - Page 21

• Manufacturer Part Number: PIC12F675T-I/SN
• Description: IC MCU CMOS 1K FLASH W/AD 8-SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 12Fr

Specifications of PIC12F675T-I/SN

• Core Size: 8-Bit
• Program Memory Size: 1.75KB (1K x 14)
• Core Processor: PIC
• Speed: 20MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-SOIC (3.9mm Width)
• Controller Family/series: PIC12
• No. Of I/o's: 6
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 64Byte
• Cpu Speed: 20MHz
• No. Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Connectivity: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: PIC12F675-I/SNTR; PIC12F675-I/SNTR; PIC12F675T-I/SN; PIC12F675T-I/SNTR; Q1324216

3.0
There are as many as six general purpose I/O pins
available. Depending on which peripherals are
enabled, some or all of the pins may not be available as
general purpose I/O. In general, when a peripheral is
enabled, the associated pin may not be used as a
general purpose I/O pin.
3.1
GPIO is an 6-bit wide, bidirectional port. The
corresponding data direction register is TRISIO.
Setting a TRISIO bit (= 1) will make the corresponding
GPIO pin an input (i.e., put the corresponding output
driver in a High-Impedance mode). Clearing a TRISIO
bit (= 0) will make the corresponding GPIO pin an
output (i.e., put the contents of the output latch on the
selected pin). The exception is GP3, which is input-only
and its TRISIO bit will always read as ‘1’. Example 3-1
shows how to initialize GPIO.
Reading the GPIO register reads the status of the pins,
whereas writing to it will write to the PORT latch. All
write operations are read-modify-write operations.
Therefore, a write to a port implies that the port pins are
read, this value is modified, and then written to the
PORT data latch. GP3 reads ‘0’ when MCLREN = 1.
The TRISIO register controls the direction of the
GP pins, even when they are being used as analog
inputs. The user must ensure the bits in the TRISIO
REGISTER 3-1:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5-0
Note:
U-0
—
GPIO PORT
GPIO and the TRISIO Registers
Additional information on I/O ports may be
found in the PIC
Manual, (DS33023).
Unimplemented: Read as ‘0’
GPIO<5:0>: General Purpose I/O pin
1 = Port pin is >V
0 = Port pin is <V
U-0
—
GPIO: GPIO REGISTER (ADDRESS: 05h)
®
Mid-Range Reference
W = Writable bit
‘1’ = Bit is set
IH
IL
GPIO5
R/W-x
GPIO4
R/W-x
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
GPIO3
R/W-x
register are maintained set when using them as analog
inputs. I/O pins configured as analog inputs always
read ‘0’.
EXAMPLE 3-1:
3.2
Every GPIO pin on the PIC12F629/675 has an
interrupt-on-change option and every GPIO pin, except
GP3, has a weak pull-up option. The next two sections
describe these functions.
3.2.1
Each of the GPIO pins, except GP3, has an individually
configurable weak internal pull-up. Control bits WPUx
enable or disable each pull-up. Refer to Register 3-3.
Each weak pull-up is automatically turned off when the
port pin is configured as an output. The pull-ups are
disabled on a Power-on Reset by the GPPU bit
(OPTION<7>).
BCF
CLRF
MOVLW
MOVWF
BSF
CLRF
MOVLW
MOVWF
Note:
Additional Pin Functions
STATUS,RP0
GPIO
07h
CMCON
STATUS,RP0
ANSEL
0Ch
TRISIO
The ANSEL (9Fh) and CMCON (19h)
registers (9Fh) must be initialized to
configure an analog channel as a digital
input. Pins configured as analog inputs will
read ‘0’. The ANSEL register is defined for
the PIC12F675.
WEAK PULL-UP
GPIO2
R/W-x
PIC12F629/675
INITIALIZING GPIO
x = Bit is unknown
;Bank 0
;Init GPIO
;Set GP<2:0> to
;digital IO
;Bank 1
;Digital I/O
;Set GP<3:2> as inputs
;and set GP<5:4,1:0>
;as outputs
GPIO1
R/W-x
DS41190G-page 21
GPIO0
R/W-x
bit 0