ZL50018 ZARLINK [Zarlink Semiconductor Inc], ZL50018 Datasheet - Page 97

• Manufacturer Part Number: ZL50018
• Description: 2 K Digital Switch with Enhanced Stratum 3 DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Note: [n] denotes output stream from 0 - 31.
15 - 12
External Read/Write Address: 0200
Reset Value: 0000
11 - 9
8 - 7
6 - 4
3 - 0
Bit
15
0
14
0
13
STOHZ[n]A2 - 0
0
STO[n]DR3 - 0
STO[n]AD2 - 0
STO[n]FA1 - 0
H
(Valid only for
Unused
STio0-15)
12
0
Name
Table 63 - Stream Output Control Register 0 - 31 (SOCR0 - 31) Bits
STOHZ
[n]A2
11
H
- 021F
STOHZ
[n]A1
10
Reserved. In normal functional mode, these bits MUST be set to zero.
STOHZ Additional Advancement Bits
Output Stream[n] Fractional Advancement Bits:
Output Stream[n] Bit Advancement Selection Bits:
The binary value of these bits refers to the number of bits that the output stream
is to be advanced relative to FPo. The maximum value is 7. Zero means no
advancement.
Output Data Rate Selection Bits:
H
STO[n]FA1-0
STOHZ
STOHZ[n]A2-0
[n]A0
9
00
01
10
11
101-111
000
001
010
100
011
Zarlink Semiconductor Inc.
STO[n]
FA1
8
ZL50018
STIN[n]DR3 - 0
0101 - 1111
STO[n]
(2.048 Mbps, 4.096 Mbps, 8.192 Mbps
FA0
0000
0001
0010
0100
97
0011
7
(2.048 Mbps, 4.096 Mbps,
Additional Advancement
STO[n]
AD2
6
Advancement
8.192 Mbps)
Reserved
streams)
1/4 bit
2/4 bit
3/4 bit
Description
1/4 bit
2/4 bit
3/4 bit
4/4 bit
STO[n]
0 bit
AD1
0
5
:
(STOHZ driven high)
disabled: STio HiZ
STO[n]
AD0
4
16.384 Mbps
2.048 Mbps
4.096 Mbps
8.192 Mbps
Data Rate
Reserved
STO[n]
DR3
3
Additional Advancement
STO[n]
DR2
2
(16.384 Mbps streams)
(16.384 Mbps)
Reserved
2/4 bit
4/4 bit
Advancement
0 bit
STO[n]
Reserved
DR1
1
2/4
Data Sheet
0
STO[n]
DR0
0