ZL50018 ZARLINK [Zarlink Semiconductor Inc], ZL50018 Datasheet - Page 81

• Manufacturer Part Number: ZL50018
• Description: 2 K Digital Switch with Enhanced Stratum 3 DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Note 1:
Note 2:
Note 1:
Note 2:
15 - 0
15 - 0
External Read/Write Address: 0054
Reset Value: F616
External Read/Write Address: 0055
Reset Value: 3B9A
Bit
Bit
MFL
MFL
15
15
15
31
The default value represents far lower limit for all reference frequencies, which is -11.287 ppm (Stratum 3 compliant
value), regardless of the reference frequency.
The name ’lower’ is based on frequency.
The default value represents far lower limit for all reference frequencies, which is -11.287 ppm (Stratum 3 compliant
value), regardless of the reference frequency.
The name ’lower’ is based on frequency.
MFL
MFL
14
14
14
30
MFL15 - 0
MFL31 - 16
Name
Name
Table 48 - Multi-period Far Lower Limit Register - Lower 16 Bits (MPFLLRL)
Table 49 - Multi-period Far Lower Limit Register - Upper 16 Bits (MPFLLRU)
H
MFL
MFL
13
13
13
H
29
(Note 1)
(Note 1)
MFL
MFL
12
12
12
28
Multiple-Period Far Lower Limit Bits: Total binary value of these bits and the
MPFLLRU register bits defines the far lower limit for the multiple period count of any
reference input, minus 1. The unit of the binary value is measured in 100 MHz clock
periods.
Multiple-Period Far Lower Limit Bits: Total binary value of these bits and the
MPFLLRL register bits defines the far lower limit for the multiple period count of any
reference input, minus 1. The unit of the binary value is measured in 100 MHz clock
periods.
H
MFL
MFL
H
11
11
11
27
MFL
MFL
10
10
10
26
MFL
MFL
25
9
9
9
Zarlink Semiconductor Inc.
ZL50018
MFL
MFL
24
8
8
8
81
MFL
MFL
23
7
7
7
Description
Description
MFL
MFL
22
6
6
6
MFL
MFL
21
5
5
5
MFL
MFL
20
4
4
4
MFL
MFL
19
3
3
3
MFL
MFL
18
2
2
2
MFL
MFL
17
1
1
1
Data Sheet
MFL
MFL
16
0
0
0