ZL50018 ZARLINK [Zarlink Semiconductor Inc], ZL50018 Datasheet - Page 60

• Manufacturer Part Number: ZL50018
• Description: 2 K Digital Switch with Enhanced Stratum 3 DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

13 - 12
CKO4
External Read/Write Address: 0004
Reset Value: 0000
15
P
Bit
15
14
10
11
9
8
7
CKO4
SEL
14
CKOFPO3
FPO3POS
CKO4SEL
SEL1 - 0
CKO4P
CKO3P
CKO2P
FPO3P
FPO2P
Name
FPO3
Table 22 - Output Clock and Frame Pulse Selection Register (OCFSR) Bits
SEL1
CKO
H
13
FPO3
SEL0
CKO
12
Output Clock (CKo4) Polarity Selection
When this bit is low, the output clock CKo4 falling edge aligns with the frame
boundary. When this bit is high, the output clock CKo4 rising edge aligns with the
frame boundary.
CKo4 is available in Master mode or in Slave mode with SLV_DPLLEN set.
Output Clock (CKo4) Frequency Selection
When this bit is low, the output clock CKo4 is 2.048 MHz.
When this bit is high, the output clock CKo4 is 1.544 MHz.
CKo4 is available in Master mode or in Slave mode with SLV_DPLLEN set.
Output Clock (CKo3) Frequency and Output Frame Pulse (FPo3) Pulse Cycle
Selection
Output Clock (CKo3) Polarity Selection
When this bit is low, the output clock CKo3 falling edge aligns with the frame
boundary. When this bit is high, the output clock CKo3 rising edge aligns with the
frame boundary.
Output Frame Pulse (FPo3) Polarity Selection
When this bit is low, the output frame pulse FPo3 has the negative frame pulse format.
When this bit is high, the output frame pulse FPo3 has the positive frame pulse format.
Output Frame Pulse (FPo3) Position
When this bit is low, FPo3 straddles frame boundary (as defined by ST-BUS).
When this bit is high, FPo3 starts from frame boundary (as defined by GCI-Bus).
Output Clock (CKo2) Polarity Selection
When this bit is low, the output clock CKo2 falling edge aligns with the frame
boundary. When this bit is high, the output clock CKo2 rising edge aligns with the
frame boundary.
Output Frame Pulse (FPo2) Polarity Selection
When this bit is low, the output frame pulse FPo2 has the negative frame pulse format.
When this bit is high, the output frame pulse FPo2 has the positive frame pulse format.
CKO3
H
11
P
FPO3
10
P
CKOFPO3
FPO3
POS
SEL1 - 0
9
Zarlink Semiconductor Inc.
00
01
10
11
ZL50018
CKO2
P
8
60
FPO2
P
7
Description
244 ns
122 ns
FPo3
61 ns
30 ns
FPO2
POS
6
CKO1
5
P
FPO1
16.384 MHz
32.768 MHz
4.096 MHz
8.192 MHz
P
4
CKo3
FPO1
POS
3
CKO0
P
2
Data Sheet
FPO0
1
P
FPO0
POS
0