TSI-2 AGERE [Agere Systems], TSI-2 Datasheet - Page 34

• Manufacturer Part Number: TSI-2
• Description: 2k x 2k Time-Slot Interchanger
• Manufacturer: AGERE [Agere Systems]

TSI-2
2k x 2k Time-Slot Interchanger
Table 6-7. Connection Store
Table 6-8. Reserved Registers
The following register will not cause an Invalid_Address_Error (see
6.5 Global Control Registers
The default field indicates the state of each register bit following a hardware or software reset cycle.
These registers are located at the top level of the design and are used to determine operations that affect more than one
block within the device. These could be registers required for control of the microprocessor port block or register functions
that are not naturally associated with other blocks. Global resets and output enables are included in this section.
Table 6-9. Version_Control (Read Only)
Table 6-10. Chip_Identity (Read Only)
34
34
0x10000—0x17FFC Low_Control_Word
0x10002—0x17FFE High_Control_Word
Address
Address
0x00000
0x00002
Address
Address
0x00016
14:12 Version_Number. TSI version number. TSI version register will change each time the
15:0 Chip_Identity. This register contains the unique identification code for the device.
11:0 Agere_Systems_Identification_Number. This is the ID code assigned to Agere Systems
Bit
Bit
15
Reserved.
device is changed.
Inc. by the JTAG standards body.
Reserved_0
Register
Register
Name/Description
Name/Description
Table 6-13 on page
36) and are reserved.
Data Sheet, Revision 3
Access Mode
September 21, 2005
Access Mode
Read/Write
Read/Write
Read/Write
Agere Systems Inc.
Default
Default
0x26D1
0x190
001
0