MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 66

• Manufacturer Part Number: MT46V16M8TG-8L
• Description: DOUBLE DATA RATE DDR SDRAM
• Manufacturer: MICRON [Micron Technology]

TIMING PARAMETERS
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
x4: A0-A9, A11
SYMBOL
t
t
t
t
t
t
t
t
t
t
COMMAND
x16: A9, A11
CH
CL
CK (2.5)
CK (2)
DH
DS
DQSH
DQSL
DQSS
DSS
x16: A0-A8
x8: A0-A9
BA0, BA1
x8: A11
DQS
DQ
CK#
CKE
A10
DM
CK
1
4
MIN
0.45
0.45
0.35
0.35
0.75
7.5
7.5
0.5
0.5
0.2
NOTE: 1. DI n = data-out from column n; subsequent elements are provided in the programmed order.
-75Z
t
t
IS
IS
NOP 5
T0
2. Burst length = 4 in the case shown.
3. Enable auto precharge.
4. ACT = ACTIVE, RA = Row Address, BA = Bank Address.
5. NOP commands are shown for ease of illustration; other commands may be valid at these times.
6. t DSH is applicable during t DQSS
MAX
7. t DSS is applicable during t DQSS
0.55
0.55
1.25
t
13
13
t
IH
IH
MIN
0.45
0.45
0.35
0.35
0.75
7.5
0.5
0.5
0.2
10
t
IS
t
Bank x
IS
-75
ACT
RA
T1
RA
RA
t
MAX
IH
t
0.55
0.55
1.25
IH
13
13
t
BANK WRITE – WITH AUTO PRECHARGE
CK
t
t
RCD
RAS
MIN
0.45
0.45
0.35
0.35
0.75
0.6
0.6
0.2
10
8
NOP 5
T2
-8
(MIN)
(MAX)
t
MAX
CH
0.55
0.55
1.25
13
13
and is referenced from CK T4 or T5.
and is referenced from CK T5 or T6.
t CL
UNITS
t
WRITE 2
IS
Bank x
t
t
t
t
t
t
Col n
3
ns
ns
ns
ns
CK
CK
CK
CK
CK
CK
T3
t
IH
t
DQSS
t
WPRES
66
(NOM)
t
DS
t
WPRE
NOP 5
t
T4
SYMBOL
t
t
t
t
t
t
t
t
t
DI
DSH
IH
IS
RAS
RCD
RP
WPRE
WPRES
WPST
WR
b
t
DSH
t
DH
6
T4n
t
t
DSS
DQSL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
MIN
0.25
0.2
0.4
7
45
20
20
15
NOP 5
1
1
0
T5
-75Z
t
t
DSH
DQSH
120,000
MAX
6
0.6
T5n
t
t
WPST
DSS
128Mb: x4, x8, x16
MIN
7
0.25
NOP 5
0.2
0.4
T6
45
20
20
15
1
1
0
-75
120,000
MAX
0.6
DDR SDRAM
t
WR
NOP 5
PRELIMINARY
T7
MIN
0.25
0.2
1.2
1.2
0.4
TRANSITIONING DATA
50
20
20
15
DON’T CARE
0
©2001, Micron Technology, Inc.
-8
120,000
MAX
0.6
NOP 5
T8
UNITS
t
t
t
ns
ns
ns
ns
ns
ns
ns
CK
CK
CK
t
RP