MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 25

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MT46V16M8TG-8L

Manufacturer Part Number
MT46V16M8TG-8L
Description
DOUBLE DATA RATE DDR SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
COMMAND
COMMAND
ADDRESS
ADDRESS
DQS
DQS
CK#
CK#
DQ
DQ
NOTE: 1. DO n = data-out from column n.
CK
CK
6
6
2. Burst length = 4, or an interrupted burst of 8.
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Shown with nominal t AC, t DQSCK, and t DQSQ.
5. READ to PRECHARGE equals two clocks, which allows two data pairs of data-out.
6. A READ command with AUTO-PRECHARGE enabled would cause a precharge to be performed
7. PRE = PRECHARGE command; ACT = ACTIVE command.
at x number of clock cycles after the READ command, where x = BL / 2.
Bank a,
Bank a,
READ
READ
Col n
Col n
T0
T0
CL = 2
NOP
NOP
T1
T1
CL = 2.5
READ to PRECHARGE
Figure 13
(a or all)
(a or all)
Bank a,
Bank a,
T2
PRE
PRE
T2
25
DO
n
T2n
T2n
DO
n
T3
NOP
T3
NOP
Micron Technology, Inc., reserves the right to change products or specifications without notice.
DON’T CARE
t RP
t RP
T3n
T3n
128Mb: x4, x8, x16
T4
T4
NOP
NOP
TRANSITIONING DATA
DDR SDRAM
PRELIMINARY
Bank a,
Bank a,
T5
T5
Row
Row
ACT
ACT
©2001, Micron Technology, Inc.

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