MT46H16M16 MICRON [Micron Technology], MT46H16M16 Datasheet
MT46H16M16
Manufacturer Part Number
MT46H16M16
Description
Mobile Double Data Rate (DDR) SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
1.MT46H16M16.pdf
(3 pages)
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Mobile Double Data Rate (DDR) SDRAM
MT46H16M16LF – 4 Meg x 16 x 4 Banks
MT46H8M32LF – 2 Meg x 32 x 4 Banks
For a complete data sheet, please refer to www.micron.com/mobileds.
Features
• V
• Bidirectional data strobe per byte of data (DQS)
• Internal, pipelined double data rate (DDR)
• Differential clock inputs (CK and CK#)
• Commands entered on each positive CK edge
• DQS edge-aligned with data for READs; center-
• Four internal banks for concurrent operation
• Data masks (DM) for masking write data–one mask
• Programmable burst lengths: 2, 4, 8, 16 or full page
• Concurrent auto precharge option is supported
• Auto refresh and self refresh modes
• 1.8V LVCMOS compatible inputs
• On-chip temperature sensor to control refresh rate
• Partial array self refresh (PASR)
• Deep power-down (DPD)
• Selectable output drive (DS)
• Clock stop capability
Options
• V
• Configuration
• Plastic Package
• Timing – Cycle Time
• Operating Temperature Range
Notes:1. Only available for x16 configuration.
PDF: 09005aef818ff781/Source: 09005aef818ff799
MT46H16M16.fm - Rev. A 03/05 EN
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron
architecture; two data accesses per clock cycle
aligned with data for WRITEs
per byte
• 1.8V/1.8V
• 16 Meg x 16 (4 Meg x 16 x 4 banks)
• 8 Meg x 32 (2 Meg x 32 x 4 banks)
• 60-Ball VFBGA
• 90-Ball VFBGA
• 6ns @ CL = 3
• 7.5ns @ CL = 3
• 10ns @ CL = 3
• Commercial (0° to +70°C)
• Industrial (-40°C to +85°C)
DD
DD
2. Only available for x32 configuration.
/V
= +1.8V ±0.1V, V
DD
Q
1
2
DD
Q = +1.8V ±0.1V
Marking
to meet Micron’s production data sheet specifications.
16M16
8M32
None
TBD
256Mb: 16 Meg x 16, 8 Meg x 32 Mobile DDR SDRAM
-75
-10
IT
-6
H
1
Figure 1: 60-Ball VFBGA Assignment
Table 1:
A
B
C
D
E
F
G
H
J
K
Configuration
Refresh Count
Row Addressing
Bank Addressing
Column Addressing
Architecture
Micron Technology, Inc., reserves the right to change products or specifications without notice.
V
V
V
V
CKE
V
V
V
DD
DD
A9
A6
1
SS
SS
SS
SS
SS
Q
Q
Q
Q
DQ15
DQ13
DQ11
UDQS
UDM
DQ9
A11
CK
A7
A4
2
Configuration Addressing
DQ14
DQ12
DQ10
V
DQ8
CK#
A12
NC
A8
A5
3
SS
Q
4 Meg x 16 x 4
16 Meg x 16
4
8K (A0–A12)
4 (BA0, BA1)
1K (A0–A9)
8K
5
©2005 Micron Technology, Inc. All rights reserved.
6
A13, NC
A10/AP
V
WE#
DQ1
DQ3
DQ5
DQ7
CS#
DD
A2
7
2 Meg x 32 x 4
Q
4K (A0–A11)
4 (BA0, BA1)
8 Meg x 32
1K (A0–A9)
LDQS
CAS#
LDM
DQ0
DQ2
DQ4
DQ6
BA0
A0
A3
8
Preview ‡
4K
V
V
V
V
RAS#
V
V
BA1
V
DD
DD
A1
9
SS
SS
DD
DD
DD
Q
Q
Q
Q
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MT46H16M16 Summary of contents
Page 1
... Mobile Double Data Rate (DDR) SDRAM MT46H16M16LF – 4 Meg Banks MT46H8M32LF – 2 Meg Banks For a complete data sheet, please refer to www.micron.com/mobileds. Features • +1.8V ±0.1V +1.8V ±0. • Bidirectional data strobe per byte of data (DQS) • Internal, pipelined double data rate (DDR) architecture ...
Page 2
... All other trademarks are the property of their respective owners. Advance: This data sheet contains initial descriptions of products still under development. PDF: 09005aef818ff781/Source: 09005aef818ff799 MT46H16M16.fm - Rev. A 03/05 EN 256Mb: 16 Meg x 16, 8 Meg x 32 Mobile DDR SDRAM ® Micron Technology, Inc., reserves the right to change products or specifications without notice. ...
Page 3
... Revision History • Original Document, Preview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 03/05 PDF: 09005aef818ff781/Source: 09005aef818ff799 MT46H16M16.fm - Rev. A 03/05 EN 256Mb: 16 Meg x 16, 8 Meg x 32 Mobile DDR SDRAM Micron Technology, Inc., reserves the right to change products or specifications without notice. 3 Preview ©2005 Micron Technology, Inc. All rights reserved. ...