MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 34

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MT46V16M8TG-8L

Manufacturer Part Number
MT46V16M8TG-8L
Description
DOUBLE DATA RATE DDR SDRAM
Manufacturer
MICRON [Micron Technology]
Datasheet
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
COMMAND
ADDRESS
NOTE: 1. DI b = data-in for column b.
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
CK#
DM
DM
DM
DQ
DQ
DQ
CK
2. Three subsequent elements of data-in are applied in the programmed order following DI b.
3. An uninterrupted burst of 4 is shown.
4. t WR is referenced from the first positive CK edge after the last data-in pair.
5. The PRECHARGE and WRITE commands are to the same device. However, the PRECHARGE and WRITE
6. A10 is LOW with the WRITE command (auto precharge is disabled).
7. PRE = PRECHARGE command.
commands may be to different devices, in which case t WR is not required and the PRECHARGE command could be
applied earlier.
Bank a,
WRITE
Col b
T0
t
t
t
DQSS
DQSS
DQSS
DI
b
WRITE to PRECHARGE – Uninterrupting
NOP
T1
DI
b
DI
b
T1n
NOP
T2
Figure 22
T2n
34
NOP
T3
t
Micron Technology, Inc., reserves the right to change products or specifications without notice.
WR
T4
NOP
DON’T CARE
128Mb: x4, x8, x16
(a or all)
Bank,
T5
PRE
7
DDR SDRAM
TRANSITIONING DATA
PRELIMINARY
t
RP
©2001, Micron Technology, Inc.
T6
NOP

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