MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 38

• Manufacturer Part Number: MT46V16M8TG-8L
• Description: DOUBLE DATA RATE DDR SDRAM
• Manufacturer: MICRON [Micron Technology]

TRUTH TABLE 2 – CKE
(Notes: 1-4)
NOTE: 1. CKE
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
CKE
H
L
L
n-1
2. Current state is the state of the DDR SDRAM immediately prior to clock edge n.
3. COMMAND
4. All states and sequences not shown are illegal or reserved.
5. DESELECT or NOP commands should be issued on any clock edges occurring during the
CKE
clock cycles is needed before applying a READ command for the DLL to lock.
H
L
L
n
n
is the logic state of CKE at clock edge n; CKE
CURRENT STATE
Bank(s) Active
n
All Banks Idle
All Banks Idle
Power-Down
Power-Down
Self Refresh
Self Refresh
is the command registered at clock edge n, and ACTION
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
DESELECT or NOP
AUTO REFRESH
COMMAND
n-1
X
X
38
was the state of CKE at the previous clock edge.
n
n
Micron Technology, Inc., reserves the right to change products or specifications without notice.
is a result of COMMAND
ACTION
Maintain Power-Down
Maintain Self Refresh
Exit Power-Down
Exit Self Refresh
Precharge Power-Down Entry
Active Power-Down Entry
Self Refresh Entry
128Mb: x4, x8, x16
n
t
XSR period. A minimum of 200
n
.
DDR SDRAM
PRELIMINARY
©2001, Micron Technology, Inc.
NOTES
5