MT46V16M8TG-8L MICRON [Micron Technology], MT46V16M8TG-8L Datasheet - Page 45

• Manufacturer Part Number: MT46V16M8TG-8L
• Description: DOUBLE DATA RATE DDR SDRAM
• Manufacturer: MICRON [Micron Technology]

CLOCK INPUT OPERATING CONDITIONS
(Notes: 1–5, 15, 16, 30; notes appear on pages 50–53) (0°C ≤ T
128Mb: x4, x8, x16 DDR SDRAM
128Mx4x8x16DDR_C.p65 – Rev. C; Pub. 4/01
PARAMETER/CONDITION
Clock Input Mid-Point Voltage; CK and CK#
Clock Input Voltage Level; CK and CK#
Clock Input Differential Voltage; CK and CK#
Clock Input Differential Voltage; CK and CK#
Clock Input Crossing Point Voltage; CK and CK#
- 0.30v
2.80v
1.45v
1.25v
1.05v
CK#
CK
NOTE:
X
1. This provides a minimum of 1.15v to a maximum of 1.35v, and is always half of V
2. CK and CK# must cross in this region.
3. CK and CK# must meet at least V
4. CK and CK# must have a minimum 700mv peak to peak swing.
5. CK or CK# may not be more positive than V
6. For AC operation, all DC clock requirements must also be satisfied.
7. Numbers in diagram reflect nominal values.
Figure 28 – SSTL_2 Clock Input
ID
(DC) min when static and is centered around V
SYMBOL
45
V
V
V
V
V
MP
IN
ID
ID
IX
X
(
(
(
(
(
AC
AC
DC
DC
DC
DD
A
)
)
)
) 0.5 x V
)
Q + 0.3v or more negative than Vss - 0.3v.
≤ + 70°C; V
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1.15
0.36
MIN
-0.3
0.7
DD
Q - 0.2 0.5 x V
DD
= +2.5V ±0.2V, V
128Mb: x4, x8, x16
V
V
V
V
DD
DD
DD
Maximum Clock Level
Minimum Clock Level
MP
MAX
1.35
Q + 0.3
Q + 0.6
Q + 0.6
DD
(DC)
Q + 0.2
1
DD
MP
DDR SDRAM
V
DD
IX
Q.
(DC)
PRELIMINARY
(AC)
Q = +2.5V ±0.2V)
©2001, Micron Technology, Inc.
2
UNITS
V
V
V
V
V
V
ID
5
5
(DC)
V
NOTES
ID
3
6, 9
6, 8
6
8
9
(AC)
4