MCF5282CVM66 Freescale, MCF5282CVM66 Datasheet - Page 654

• Manufacturer Part Number: MCF5282CVM66
• Manufacturer: Freescale

Specifications of MCF5282CVM66

• Cpu Family: MCF528x
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 66MHz
• Interface Type: CAN/I2C/QSPI/UART
• Total Internal Ram Size: 64KB
• # I/os (max): 150
• Number Of Timers - General Purpose: 12
• Operating Supply Voltage (typ): 3.3V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 256
• Package Type: MA-BGA
• Program Memory Type: Flash
• Program Memory Size: 512KB
• Lead Free Status / RoHS Status: Compliant

Debug Support
Command Sequence:
Operand Data:
Result Data:
30.5.3.3.12 Write Debug Module Register (
The operand (longword) data is written to the specified debug module register. All 32 bits of the register
are altered by the write. DSCLK must be inactive while the debug module register writes from the CPU
accesses are performed using the WDEBUG instruction.
Command Format:
Table 30-3
Command Sequence:
Operand Data:
Result Data:
30-36
15
shows the definition of the DRc write encoding.
0x2
WDMREG
???
12
None
The contents of the selected debug register are returned as a longword value. The
data is returned most-significant word first.
Longword data is written into the specified debug register. The data is supplied
most-significant word first.
Command complete status (0xFFFF) is returned when register write is complete.
11
Figure 30-39.
Figure 30-40.
Figure 30-38.
RDMREG
???
’NOT READY’
’ILLEGAL’
MS DATA
0xC
XXX
WDMREG
WDMREG
RDMREG
MS RESULT
’ILLEGAL’
D[31:16]
8
D[15:0]
WDMREG
XXX
XXX
BDM Command Format
Command Sequence
Command Sequence
’NOT READY’
’NOT READY’
NEXT CMD
7
LS DATA
)
100
’NOT READY’
LS RESULT
NEXT CMD
NEXT CMD
5
’CMD COMPLETE’
NEXT CMD
4
Freescale Semiconductor
DRc
0